An Improved Hardware Accelaration Architecture of Binary Neural Network With 1T1R Array Based Forward/Backward Propagation Module

Abstract

An improved hardware acceleration architecture of RRAM based Binary Neural Networks (BNNs) is proposed and demonstrated. In the architecture, a 1T1R array-based propagation module is introduced and designed to realize the computing acceleration of fully parallel Vector-Matrix Multiplication (VMM) in both forward and backward propagation. By using the propagation module, high acceleration is achieved in both training (50×) and inference (273×) process.