Configuration code generation and optimizations for heterogeneous reconfigurable DSPs

1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation (Cat. No.99TH8461) Pub Date : 1999-10-20 DOI:10.1109/SIPS.1999.822322

Suet-Fei Li, M. Wan, J. Rabaey

引用次数: 6

Abstract

In this paper we describe a code generation and optimization process for reconfigurable architectures targeting digital signal processing and wireless communication applications. The ability to generate efficient and compact code is essential for the success of reconfigurable architectures. Otherwise, the overhead of reconfiguring could easily become the system bottleneck. Our code generation process includes the evaluation a set of tradeoffs in system design, software engineering as well as usage of a set of local and global optimization techniques. By doing so we are able to achieve results of significantly lower overhead.

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异构可重构dsp的配置代码生成和优化

本文描述了针对数字信号处理和无线通信应用的可重构架构的代码生成和优化过程。生成高效和紧凑代码的能力对于可重构架构的成功至关重要。否则，重新配置的开销很容易成为系统瓶颈。我们的代码生成过程包括评估系统设计、软件工程中的一组权衡，以及使用一组局部和全局优化技术。通过这样做，我们能够获得显著降低开销的结果。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation (Cat. No.99TH8461)

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