{"title":"Research on packaging effects of three-axis SOI MEMS accelerometer","authors":"Hung-Te Yang, Yen-Fu Su, K. Chiang","doi":"10.1109/EUROSIME.2015.7103101","DOIUrl":null,"url":null,"abstract":"This paper presents the packaging and residual stress effects on three-axis silicon-on-insulator (SOI) micro-electro-mechanical system (MEMS) accelerometer by using finite element method (FEM). The 3D FEM model was established and the resonance frequency was obtained by modal analysis method. This paper also developed a simple compensation model for trimming the offset of capacitance differentiation by measuring resonance frequency. It can be trimmed by adjusting application-specific integrated circuit (ASIC) gain. The capacitance differentiation offset which is caused by packaging effect can be effectively compensated to the standard capacitance differentiation.","PeriodicalId":250897,"journal":{"name":"2015 16th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-04-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 16th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EUROSIME.2015.7103101","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper presents the packaging and residual stress effects on three-axis silicon-on-insulator (SOI) micro-electro-mechanical system (MEMS) accelerometer by using finite element method (FEM). The 3D FEM model was established and the resonance frequency was obtained by modal analysis method. This paper also developed a simple compensation model for trimming the offset of capacitance differentiation by measuring resonance frequency. It can be trimmed by adjusting application-specific integrated circuit (ASIC) gain. The capacitance differentiation offset which is caused by packaging effect can be effectively compensated to the standard capacitance differentiation.
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