{"title":"An enhanced current mirror for SSO simulation","authors":"B. Young","doi":"10.1109/EPEPS.2012.6457858","DOIUrl":null,"url":null,"abstract":"Current mirrors are an established technique for reducing memory requirements and run time in Spice-based bus simulations with many simultaneously switching outputs (SSO). Mismatched delayss can reduce accuracy, and a current mirror bus architecture enhanced with a bridge circuit is shown to restore accuracy with mismatched package delays.","PeriodicalId":188377,"journal":{"name":"2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems","volume":"20 6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEPS.2012.6457858","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Current mirrors are an established technique for reducing memory requirements and run time in Spice-based bus simulations with many simultaneously switching outputs (SSO). Mismatched delayss can reduce accuracy, and a current mirror bus architecture enhanced with a bridge circuit is shown to restore accuracy with mismatched package delays.
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