Ultimate single electronics with silicon nanowire MOSFETs

A. Fujiwara, K. Nishiguchi, G. Yamahata, K. Chida
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Abstract

Scaling of silicon MOSFETs has been predicted to go around 10 nm and below. For such a small transistor a gate-all-around nanowire is regarded as an ideal geometry to maintain gate control. On the other hand, such downsizing and excellent gate control has provided opportunities to control individual electrons one by one by placing gates on top of the nanowire to define charge islands and potential barriers electrically. In addition prominent stability and reproducibility of silicon MOSFETs are undoubted benefits for practical applications of such devices.
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硅纳米线mosfet的终极单电子器件
硅mosfet的缩放预计在10纳米左右或以下。对于这样一个小晶体管,栅极全能纳米线被认为是维持栅极控制的理想几何形状。另一方面,这种小型化和出色的栅极控制提供了一个接一个地控制单个电子的机会,通过在纳米线顶部放置栅极来定义电荷岛和电势势垒。此外,硅mosfet突出的稳定性和可重复性无疑是这类器件实际应用的优势。
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