{"title":"A 1.3 V noise-cancelling low noise amplifier for ultra wideband applications","authors":"Li-Wei Chen, R. Weng, R. Huang, Shih-Kai Chen","doi":"10.1109/GCCE.2016.7800317","DOIUrl":null,"url":null,"abstract":"An ultra wideband (UWB) noise-cancelling low-noise amplifier (NCLNA) is proposed in this paper. A common-gate input stage with an input matching network is implemented to make input resistance matching to 50-ohm. The power consumption of the presented NCLNA can be lower by using current-reuse architecture. A noise cancelling technique is adopted to decrease the noise generated by the first common-gate stage. The designed NCLNA is implemented in 180 nm CMOS technology. The simulated results show that the noise figure is among 2.65-3.45 dB within the full bandwidth of 3.1-10.6 GHz. The maximum gain is 15.33 dB in the desired UWB band. Both the input and output reflection coefficients are below -10 dB. The linearity IIP3 is -5.5 dBm at 6 GHz. The core circuit consumption is 9.13mW under a 1.3 V supply voltage.","PeriodicalId":416104,"journal":{"name":"2016 IEEE 5th Global Conference on Consumer Electronics","volume":"55 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 5th Global Conference on Consumer Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GCCE.2016.7800317","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
An ultra wideband (UWB) noise-cancelling low-noise amplifier (NCLNA) is proposed in this paper. A common-gate input stage with an input matching network is implemented to make input resistance matching to 50-ohm. The power consumption of the presented NCLNA can be lower by using current-reuse architecture. A noise cancelling technique is adopted to decrease the noise generated by the first common-gate stage. The designed NCLNA is implemented in 180 nm CMOS technology. The simulated results show that the noise figure is among 2.65-3.45 dB within the full bandwidth of 3.1-10.6 GHz. The maximum gain is 15.33 dB in the desired UWB band. Both the input and output reflection coefficients are below -10 dB. The linearity IIP3 is -5.5 dBm at 6 GHz. The core circuit consumption is 9.13mW under a 1.3 V supply voltage.