E. Murakami, K. Umeda, T. Yamanaka, S. Kimura, H. Aono, K. Makabe, K. Okuyama, Y. Ohji, Y. Yoshida, M. Minami, K. Kuroda, S. Ikeda, K. Kubota
{"title":"Impact of low-standby-power device design on hot carrier reliability","authors":"E. Murakami, K. Umeda, T. Yamanaka, S. Kimura, H. Aono, K. Makabe, K. Okuyama, Y. Ohji, Y. Yoshida, M. Minami, K. Kuroda, S. Ikeda, K. Kubota","doi":"10.1109/VLSIT.2001.934978","DOIUrl":null,"url":null,"abstract":"The hot-carrier (HC) reliability of low-standby-power 0.1 /spl mu/m n-MOSFETs is investigated, and design guidelines for channel and halo profiles are described. The heavy channel-doping needed to obtain high V/sub th/ enhances HC-injection efficiency, and heavy halo-doping dramatically reduces the lifetime when using substrate-bias (V/sub bb/). Shallow-channel and tilted-halo doping is optimal to keep the HC-generation site away from the SiO/sub 2/-Si interface and to minimize the vertical electric field that is responsible for secondary impact ionization.","PeriodicalId":232773,"journal":{"name":"2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2001.934978","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The hot-carrier (HC) reliability of low-standby-power 0.1 /spl mu/m n-MOSFETs is investigated, and design guidelines for channel and halo profiles are described. The heavy channel-doping needed to obtain high V/sub th/ enhances HC-injection efficiency, and heavy halo-doping dramatically reduces the lifetime when using substrate-bias (V/sub bb/). Shallow-channel and tilted-halo doping is optimal to keep the HC-generation site away from the SiO/sub 2/-Si interface and to minimize the vertical electric field that is responsible for secondary impact ionization.