Techniques for Correlating Power Distribution Network Simulations with Physical Measurements

Abstract

Power Distribution Network (PDN) noise management is becoming increasingly challenging; increasing clock frequencies create faster current transients for the same application, shrinking die sizes crowd the current into a smaller area of the package increasing current density and effective inductance, and higher utilization of on die circuits results in less static circuit capacitance for decoupling. Thus, accurate prediction of PDN noise continues to be critical to the design process. In this paper, we will touch upon a range of strategies for verifying PDN noise simulation results. Novel aspects include use of on-chip Power Glitch Detector (PGD) to measure peak noise, direct simulation of realistic application code and comparison to on-die measurements, high resolution PDN frequency response characterization through parameterized application code, and findings for board and package model extraction tool selection.