A Novel Control Scheme for Symmetric Seven Level Reduced Device Count Multi-Level DC Link (MLDCL) Inverter

Abstract

This paper presents a novel control scheme for symmetric seven level Multi-Level DC link Inverter (MLDCL) as fed to RL load with reduced carrier strategy. The design of 7L-MLDCL can be done by taking three equal DC sources (assume PV with Boost converters) as level generator side and output phase voltage is taken at polarity generator side. All the traditional MLI like CHB, DCMLI, FCMLIs for generating ‘m’ level output, takes the switch count around 2(m-1) but the proposed inverter can reduce the switch count as (m+3). In reduced device count (RDC) MLIs, switch count reduction is one of important factor in the mean of each switch generally requires gate driver circuit, protection circuit and heat sink. The Simulation results of proposed inverter are validated through MATLAB/Simulink environment.