{"title":"ChipDE - A Development Environment for System Verilog-Based Digital IC Design","authors":"L. Kohútka, V. Stopjaková","doi":"10.1109/ICETA.2018.8572078","DOIUrl":null,"url":null,"abstract":"A new software tool - ChipDE, which represents an efficient development environment for description of digital integrated circuits (IC) based on SystemVerilog language is presented. The proposed ChipDE tool provides various features, such as text editing, file/project browser, syntax-highlighting, code auto-completion, go to definition, block diagram drawing, generation of SystemVerilog code from block diagrams and generation of block diagrams from SystemVerilog code. The proposed ChipDE tool can significantly reduce the digital IC development time, enrich the documentation using the block diagrams and improve the overall readability and maintainability of designed digital integrated circuits and systems. Moreover, the proposed software solution can be used for didactic purposes, since the tool reduces the difficulty and time needed to learn SystemVerilog language, and helps to learn the basic design concepts and practical examples of digital IC designs.","PeriodicalId":304523,"journal":{"name":"2018 16th International Conference on Emerging eLearning Technologies and Applications (ICETA)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 16th International Conference on Emerging eLearning Technologies and Applications (ICETA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICETA.2018.8572078","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A new software tool - ChipDE, which represents an efficient development environment for description of digital integrated circuits (IC) based on SystemVerilog language is presented. The proposed ChipDE tool provides various features, such as text editing, file/project browser, syntax-highlighting, code auto-completion, go to definition, block diagram drawing, generation of SystemVerilog code from block diagrams and generation of block diagrams from SystemVerilog code. The proposed ChipDE tool can significantly reduce the digital IC development time, enrich the documentation using the block diagrams and improve the overall readability and maintainability of designed digital integrated circuits and systems. Moreover, the proposed software solution can be used for didactic purposes, since the tool reduces the difficulty and time needed to learn SystemVerilog language, and helps to learn the basic design concepts and practical examples of digital IC designs.