Efficient building blocks for delay insensitive circuits

Abstract

We introduce a new set of primitive elements for delay-insensitive (DI) circuit design. This set is shown to be universal and minimal, that is, any DI circuit can be constructed using only these primitives, and no proper subset of them is sufficient for constructing all such circuits. We give area efficient fast, and robust switch-level implementations of key primitives and show how to use them to construct other DI circuit elements commonly found in the literature.