Simulation of CsGeI3-based perovskite solar cells using Graphene Oxide interfacial layer for improved device performance

Abhijit Das, D. P. Samajdar
{"title":"Simulation of CsGeI3-based perovskite solar cells using Graphene Oxide interfacial layer for improved device performance","authors":"Abhijit Das, D. P. Samajdar","doi":"10.1109/ICEE56203.2022.10117767","DOIUrl":null,"url":null,"abstract":"In this paper, we have investigated the effect of the Graphene Oxide (GO) interfacial layer (IL) inserted between the absorber layer and Electron Transport Layer (ETL) in lead (Pb)-free all inorganic CsGeI3-based perovskite solar cells (PSCs) using solar cell simulator capacitance software (SCAPS-ID). The performance parameters of the FTO/Ti02/GO/CsGeI3/P3HT PSC device structure have been studied thoroughly, by changing the thickness of the active layer and IL, bulk defect density with defect energy levels of the absorber layer, band gap variation of the Graphene Oxide thin film and the variation of shunt and series resistance. It has been found that the introduction of GO interlayer in the PSC improved the device efficiency by ~ 6%. This is mainly due to the passivation of trap states (i.e. reducing charge recombination and ion migration), efficient band alignment and improved charge injection at the Perovskite/ETL interface. We have reported an optimized power conversion efficiency (PCE) (%) value of 20.03% for the proposed device structure and observed a remarkable improvement in performance parameters.","PeriodicalId":281727,"journal":{"name":"2022 IEEE International Conference on Emerging Electronics (ICEE)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Conference on Emerging Electronics (ICEE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEE56203.2022.10117767","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

In this paper, we have investigated the effect of the Graphene Oxide (GO) interfacial layer (IL) inserted between the absorber layer and Electron Transport Layer (ETL) in lead (Pb)-free all inorganic CsGeI3-based perovskite solar cells (PSCs) using solar cell simulator capacitance software (SCAPS-ID). The performance parameters of the FTO/Ti02/GO/CsGeI3/P3HT PSC device structure have been studied thoroughly, by changing the thickness of the active layer and IL, bulk defect density with defect energy levels of the absorber layer, band gap variation of the Graphene Oxide thin film and the variation of shunt and series resistance. It has been found that the introduction of GO interlayer in the PSC improved the device efficiency by ~ 6%. This is mainly due to the passivation of trap states (i.e. reducing charge recombination and ion migration), efficient band alignment and improved charge injection at the Perovskite/ETL interface. We have reported an optimized power conversion efficiency (PCE) (%) value of 20.03% for the proposed device structure and observed a remarkable improvement in performance parameters.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
利用氧化石墨烯界面层模拟基于csgei3的钙钛矿太阳能电池以提高器件性能
本文利用太阳能电池模拟电容软件(SCAPS-ID)研究了无铅(Pb)全无机csgei3基钙钛矿太阳能电池(PSCs)中,在吸收层和电子传输层(ETL)之间插入氧化石墨烯(GO)界面层(IL)的影响。通过改变有源层厚度和IL、吸收层体积缺陷密度随缺陷能级的变化、氧化石墨烯薄膜带隙的变化以及并联电阻和串联电阻的变化,对FTO/ tio2 /GO/CsGeI3/P3HT PSC器件结构的性能参数进行了深入的研究。研究发现,在PSC中引入氧化石墨烯中间层可使器件效率提高约6%。这主要是由于陷阱状态的钝化(即减少电荷重组和离子迁移),有效的能带对准和钙钛矿/ETL界面上改进的电荷注入。我们已经报告了优化的功率转换效率(PCE)(%)值为20.03%,并且观察到性能参数的显着改善。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Organic Dye Based Longer Wavelength Photodetector for Narrowband Application Numerical Simulation and Parameter Extraction of Pure Thermionic Emission Across Schottky Contacts Inkjet-printed mesoporous indium oxide-based near-vertical transport thin film transistors and pseudo-CMOS inverters Flash imaging for microfluidics Fabrication and optimization of T -gate for high performance HEMT and MMIC devices
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1