{"title":"A 4.32 GOPS 1 W general-purpose DSP with an enhanced instruction set for wireless communication","authors":"A. Olofsson, F. Lange","doi":"10.1109/ISSCC.2002.992935","DOIUrl":null,"url":null,"abstract":"The authors present a 6 GOPS DSP which implements the TigerSharc architecture with an instruction set enhanced for wireless communication. It is implemented in a 0.13 μm CMOS process with 8 layers of copper interconnect and operates at 250 MHz with 1 W power dissipation under nominal conditions.","PeriodicalId":423674,"journal":{"name":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2002.992935","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
The authors present a 6 GOPS DSP which implements the TigerSharc architecture with an instruction set enhanced for wireless communication. It is implemented in a 0.13 μm CMOS process with 8 layers of copper interconnect and operates at 250 MHz with 1 W power dissipation under nominal conditions.
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