Ultra low power capacitive power management unit in 0:18μm CMOS

S. K. Kasodniya, B. Mishra, N. Desai
{"title":"Ultra low power capacitive power management unit in 0:18μm CMOS","authors":"S. K. Kasodniya, B. Mishra, N. Desai","doi":"10.1109/VLSI-SATA.2016.7593057","DOIUrl":null,"url":null,"abstract":"This paper presents the design and simulation of a two stage power management circuit implemented in 0:18μm CMOS that operates from very low voltages starting from 460mV and higher up to a maximum of 800mV. The proposed capacitive power management unit consumes very low power of 11μW @ 500mV sufficient to be operated from tiny photovoltaic cells, dimensions of few mm2. In addition to the lower power consumption, the proposed circuit does not need any off chip components; ideal for ultra low power wireless sensor nodes.","PeriodicalId":328401,"journal":{"name":"2016 International Conference on VLSI Systems, Architectures, Technology and Applications (VLSI-SATA)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 International Conference on VLSI Systems, Architectures, Technology and Applications (VLSI-SATA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSI-SATA.2016.7593057","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

Abstract

This paper presents the design and simulation of a two stage power management circuit implemented in 0:18μm CMOS that operates from very low voltages starting from 460mV and higher up to a maximum of 800mV. The proposed capacitive power management unit consumes very low power of 11μW @ 500mV sufficient to be operated from tiny photovoltaic cells, dimensions of few mm2. In addition to the lower power consumption, the proposed circuit does not need any off chip components; ideal for ultra low power wireless sensor nodes.
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超低功耗电容式电源管理单元,0:18μm CMOS
本文设计并仿真了一种采用0:18μm CMOS实现的两级电源管理电路,该电路工作在从460mV到800mV的极低电压下。所提出的电容式电源管理单元功耗极低,仅为11μW @ 500mV,足以在尺寸仅为几平方毫米的微型光伏电池上运行。除了较低的功耗外,所提出的电路不需要任何片外元件;理想的超低功耗无线传感器节点。
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