Optimization of the design of the heterojunction vertical field effect transistor using a two-dimensional self-consistent Monte Carlo method

Abstract

Extensive Monte Carlo simulations of both steady-state and transient operation of a heterojunction vertical field-effect transistor (VFET) show that the discrepancy between measured and predicted cutoff frequencies for the device has two causes. First, experiments with lateral gate placement show that fabricated devices have not been optimized for high-speed performance. In addition, it is shown that because the operation of the devices in this study was governed by hot carrier transport and multidimensional space charge effects, previous predictions which did not take these phenomena into account are unrealistic. The structure and characteristics of the device used to verify the accuracy of the simulation method are described. A simple conceptual model which considers both local current continuity and space charges is presented for understanding the Monte Carlo results.<>