M. Nakajima, T. Yamamoto, S. Ozaki, I. Sezaki, T. Kanakogi, T. Furuzono, T. Sakamoto, T. Aruga, M. Sumita, M. Tsutsumi, A. Ueda, T. Ichinomiya
{"title":"A 400MHz 32b embedded microprocessor core AM34-1 with 4.0GB/s cross-bar bus switch for SoC","authors":"M. Nakajima, T. Yamamoto, S. Ozaki, I. Sezaki, T. Kanakogi, T. Furuzono, T. Sakamoto, T. Aruga, M. Sumita, M. Tsutsumi, A. Ueda, T. Ichinomiya","doi":"10.1109/ISSCC.2002.993072","DOIUrl":null,"url":null,"abstract":"A 32b RISC microprocessor core for Digital TV SoC occupies 14.8mm/sup 2/ in 0.13/spl mu/m CMOS with six Cu layers. The core runs at 400MHz with 500mW average dissipation at 1.35V. The integrated 4.0GB/s 3/spl times/4 cross-bar bus switch improves sustained system performance efficiency by 1.75 times.","PeriodicalId":423674,"journal":{"name":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2002.993072","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 19
Abstract
A 32b RISC microprocessor core for Digital TV SoC occupies 14.8mm/sup 2/ in 0.13/spl mu/m CMOS with six Cu layers. The core runs at 400MHz with 500mW average dissipation at 1.35V. The integrated 4.0GB/s 3/spl times/4 cross-bar bus switch improves sustained system performance efficiency by 1.75 times.
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