Low-cost design for repair with circuit partitioning

Abstract

Silicon validation becomes difficult because of rapidly increasing complexity and operation speed of integrated circuits. When an error is found after a chip is fabricated, post-silicon repair is necessary. Full mask revision may significantly increase the cost and time-to-market. In this paper, we describe partial metal revision techniques in which only top-level metal layers are revised to fix “small” errors with minimal increase of the cost. When an error cannot be fixed by partial metal layer revision, full metal revision or full mask revision is necessary. However, frequently errors are small enough to be fixed by partial metal layer revision. Effective partitioning and pin-extension to top-level metal layers can significantly improve the repairability by using top-level metal revision.