VLSI implementation of an associative content addressable memory based on Hopfield network model

Abstract

The content addressable memory (CAM) is allowed to search a data word without knowing where its address is. In addition, it is permissible to associate the content of the location or neighboring locations where the data word was identified. This paper presents our own approach for VLSI hardware implementation of the CAM memory. The proposed solution uses a Hopfield neural network model and is characterized by simplicity and the possibility of using the same hardware structures for saving may data patterns. Will be presented design methods and implementation to VLSI circuit structures, the performance of our solution and experimental results.