Geostatistics inspired fast layout optimization of nanoscale CMOS phase locked loop

Abstract

In this paper, we present a geostatistical method for design and optimization of analog and mixed signal circuits design illustrated with the design of phase locked loop (PLL) systems used in Wide Area Network (WAN) and Private Mobile Radio (PMR) applications. The proposed method incorporates the use of a geostatistic based metamodeling technique (Kriging) and optimization algorithm (gravitational search algorithm) and is compared to similar approaches. The results show that the geostatistical methods provide more accurate metamodels and more efficient optimization design techniques. To the best of the authors' knowledge, this is the first geostatistical method for metamodeling and optimization of PLL designs. The proposed optimization could achieve 79% reduction in PLL power with 4% reduction in locking time without any area penalty.