Development of highly reliable CSP

Y. Yamaji, H. Juso, Y. Ohara, Yuji Matsune, K. Miyata, Y. Sota, A. Narai, T. Kimura, K. Fujita, M. Kada
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引用次数: 12

Abstract

High density packages are demanded due to recent miniaturization for personal tools. In order to satisfy these demands, development is being done in various companies in CSP (Chip-Size-Package or Chip-Scale-Package) in which its package size in nearly the same as LSI chip and function is close to bare chip. We have developed and mass production of CSP using current equipment based on a proven packaging technology involving wire bonding and transfer mold technology. We can realize 0.8 mm terminal pitch and from the memory with a few to ASIC with 300 in pin counts using this technology and correspond to various matrix layout independent of LSI chip size. The CSP developed by us uses polyimide with one side pattern. After mounting the LSI chip and connecting with wire bonding, one side is contained with mold resin. External terminals use solder ball which is of area array structure. In order to minimize the outline size of the package to be as close to the LSI chip as possible, various technologies were developed such as ultra-short loop wire bonding technology of a half length compared to conventional loop length, super-small solder ball mounting technology how far size of 0.3 mm /spl phi/, low stress high precision cutting technology with laser and fine pattern technology of substrate. Furthermore, in order to maintain high reliability to the level attained in conventional plastic packages, development was done on thermally resistant insulator and on mold resin which increase the adherence with substrate. Work was also done to reduce the effect of moisture in package through vent hole in pattern substrate. Regarding mounting to the PCB, the CSP developed by us is able to be mounted by merely recognizing of package's high precision outline with laser cutting technology and mounting with other packages is possible due to collective reflow which utilize conventional technologies. Reliability evaluation after mounting has shown that it is very realistic levels for us. By developing the above technologies and developing new materials, packaging technology for a highly reliable CSP was made possible.
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开发高可靠性的光热发电系统
由于最近个人工具的小型化,需要高密度的包装。为了满足这些需求,各公司正在开发CSP (chip - size - package或chip - scale - package),其封装尺寸几乎与LSI芯片相同,功能接近裸芯片。我们利用现有的设备开发和批量生产CSP,该设备基于成熟的封装技术,包括电线粘合和转移模具技术。利用该技术可以实现0.8 mm的终端间距,从几个引脚数的存储器到300个引脚数的ASIC,并对应与LSI芯片尺寸无关的各种矩阵布局。我们研制的光热聚酰亚胺采用单侧图案聚酰亚胺。在安装LSI芯片并通过线键连接后,一侧包含模具树脂。外部端子采用面阵结构的焊球。为了使封装的外形尺寸尽可能地接近LSI芯片,开发了各种技术,如与传统环路长度相比长度为一半的超短环路线键合技术、尺寸为0.3 mm /spl phi/的超小焊接球安装技术、激光低应力高精度切割技术和衬底精细图案技术。此外,为了保持传统塑料封装所达到的高可靠性水平,开发了耐热绝缘体和模具树脂,以增加与基材的粘附性。同时还进行了减少水分通过图案基板排气孔进入封装的工作。关于安装到PCB上,我们开发的CSP只需通过激光切割技术识别封装的高精度轮廓即可安装,并且由于使用传统技术的集体回流,可以与其他封装一起安装。安装后的可靠性评估表明,对我们来说是非常现实的水平。通过上述技术的发展和新材料的开发,使高可靠性CSP的封装技术成为可能。
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