Dynamic Load Balancing within a High Performance Graphics System

Abstract

Interactive 3D graphics applications require significant arithmetic processing to meet the ever-inreasing desire for higher image complexity and higher resolution in displayed images. This paper describes a graphics processor architecture with a high degree of parallelism connected to a distributed frame buffer. The architecture can be configured with an arbitrary number of identical, high level programmable processors operating in parallel. Within the architecture an automatic load balancing mechanism is presented which distributes the processing load between geometry and rendering section. After the unique features of the architecture are described the load balancing mechanism is analyzed and the increase of performance is demonstrated.