{"title":"High Gain LNA Design For WMAN Receiver & Optimization With Simulated Annealing Algorithm","authors":"F. Kalantari, N. Masoumi, A. R. Hoseini","doi":"10.1109/MIXDES.2006.1706588","DOIUrl":null,"url":null,"abstract":"This paper presents a 5.25 GHz high linearity high gain LNA design for a receiver architecture based on IEEE802.16a WMAN standard. The targeted frequency band is the unlicensed band UNII 5 GHz. In our design we consider the effect of induced gate noise in MOS devices. Also we optimize our design with a random search algorithm named simulated annealing and we compare the results. The amplifier achieves voltage gain of 27.1 and 28.5 dB, noise figure of 2.03 and 2.26 dB, the IIP3 of 13.1 and 14 dBm, and the reverse isolation is about -11.03 and -11.22 dB, the LNA dissipates 7.5, 6.0 mW using a 1.8 V supply voltage respectively. Optimized design is simulated with Hspice in 0.18 mum CMOS technology","PeriodicalId":318768,"journal":{"name":"Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MIXDES.2006.1706588","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper presents a 5.25 GHz high linearity high gain LNA design for a receiver architecture based on IEEE802.16a WMAN standard. The targeted frequency band is the unlicensed band UNII 5 GHz. In our design we consider the effect of induced gate noise in MOS devices. Also we optimize our design with a random search algorithm named simulated annealing and we compare the results. The amplifier achieves voltage gain of 27.1 and 28.5 dB, noise figure of 2.03 and 2.26 dB, the IIP3 of 13.1 and 14 dBm, and the reverse isolation is about -11.03 and -11.22 dB, the LNA dissipates 7.5, 6.0 mW using a 1.8 V supply voltage respectively. Optimized design is simulated with Hspice in 0.18 mum CMOS technology
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