Low Power [session summary]

Abstract

Summary form only given, as follows. Power considerations for today¿s systems are very important. Portable applications, remote applications and consumer products are all driving the need for reduced power consumption. Battery based systems are becoming much more prevalent and consumers do not wish to sacrifice performance. Thus minimizing power consumption is a very hot topic and the focus of this technical session. The session begins with a fabricated MPU design exhibiting very low power consumptiion using a multi-threshold scheme with separation by silicon-on-insulator (SOI) technology. A novel ultra low voltage differential technology with adjustable threshold voltages (and current-mirror and current-inverter applications using floating gate transistors) is presented. High level synthesis scheduling for multiple supply voltages is then presented. Another multiple supply voltage scheme is shown taking advantage of dual supply rails to all cells and proper scheduling of which rail is used for each cell. This scheme saves power at minimal cost of area and timing. Ultra low-power supply voltages below 1V introduce constraints not seen at higher supply voltages. A new MOSFET model is then presented that provides insight into the on/off current interdependence which becomes critical with voltage scaling. A new conditional-sum addition rule for low power applications is then presented. Next paper presents design technique for very low power applied to Speech Codec in the Personal Digital Cellular Phone. The final paper of this session outlines a PC-on-a-chip system using multi-chip package technology. This single package system requires numerous low power features implemented in silicon and this paper demonstrates such a system.