Design and Performance Analysis of 6H-SiC Metal-Semiconductor Field-Effect Transistor with Undoped and Recessed Area under Gate in 10nm Technology

Abstract

In this paper, the impact of the undoped and recessed gate structure on the performance of the silicon carbide metal semiconductor field effect transistor is presented. The importance of the silicon carbide metal semiconductor field effect transistor analyzed using technology computer aided design simulations in 10 nanometer technology. The proposed undoped gate structure has minimized ionized impurity scattering, leading to increased electron mobility and improved carrier concentration. Performance metrics such as drain current, transconductance, subthreshold slope, and cutoff frequency were evaluated and compared with conventional silicon carbide metal semiconductor field effect transistor structures. The proposed device exhibits superior current driving capabilities, enhanced transconductance, and reduced leakage currents, leading to improved power efficiency. Moreover, the recessed gate structure contributes to a significant reduction in short-channel effects, making the device more suitable for high frequency applications. The simulation parameters were calculated and compared with conventional structure with the length of the source and drain in 10 nanometer node. Therefore the drain current of this proposed device has been improved by 68%.