{"title":"High resolution digital pulse width modulator architecture using reversible synchronous sequential counter and synchronous phase-shifted circuit","authors":"S.K. Binu Siva Singh, K.V. Karthikeyan","doi":"10.1504/ijhpsa.2023.130225","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":39217,"journal":{"name":"International Journal of High Performance Systems Architecture","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Journal of High Performance Systems Architecture","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1504/ijhpsa.2023.130225","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"Computer Science","Score":null,"Total":0}
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