{"title":"A 20-Gb/s PAM-4 Receiver with Dual-mode Threshold Voltage Adaptation using a Time-based LSB Decoder","authors":"Jeong-Mi Park, Jin-Ku Kang","doi":"10.5573/jsts.2023.23.5.303","DOIUrl":null,"url":null,"abstract":"This paper presents a pulse amplitude modulation-4 (PAM-4) receiver with dual-mode threshold voltage applied to a time-based LSB decoder. The proposed receiver can select the threshold voltage that improves the robustness to sampler voltage variations. It also presents a random data-based threshold voltage adaptation using a single error sampler. Compared to the conventional PAM-4 threshold voltage adaptation that finds four data levels, this method finds only two levels, which reduces the overall power consumption, hardware complexity and adaptation time. The 20-Gb/s PAM-4 serial link was designed in a 65 nm CMOS Technology and analyzed with XMODEL and Cadence Design System","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.5000,"publicationDate":"2023-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Semiconductor Technology and Science","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.5573/jsts.2023.23.5.303","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a pulse amplitude modulation-4 (PAM-4) receiver with dual-mode threshold voltage applied to a time-based LSB decoder. The proposed receiver can select the threshold voltage that improves the robustness to sampler voltage variations. It also presents a random data-based threshold voltage adaptation using a single error sampler. Compared to the conventional PAM-4 threshold voltage adaptation that finds four data levels, this method finds only two levels, which reduces the overall power consumption, hardware complexity and adaptation time. The 20-Gb/s PAM-4 serial link was designed in a 65 nm CMOS Technology and analyzed with XMODEL and Cadence Design System
期刊介绍：
Journal of Semiconductor Technology and Science is published to provide a forum for R&D people involved in every aspect of the integrated circuit technology, i.e., VLSI fabrication process technology, VLSI device technology, VLSI circuit design and other novel applications of this mass production technology. When IC was invented, these people worked together in one place. However, as the field of IC expanded, our individual knowledge became narrower, creating different branches in the technical society, which has made it more difficult to communicate as a whole. The fisherman, however, always knows that he can capture more fish at the border where warm and cold-water meet. Thus, we decided to go backwards gathering people involved in all VLSI technology in one place.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
