Pub Date : 2024-02-29DOI: 10.5573/jsts.2024.24.1.18
Chang-Young Lim, Yeon-Seok Kim, Min-Woo Kwon
{"title":"Interfacial Trap-based 1-row Hammer Analysis of BCAT and Nitride Layer BCAT Structures in Dynamic Random Access Memory","authors":"Chang-Young Lim, Yeon-Seok Kim, Min-Woo Kwon","doi":"10.5573/jsts.2024.24.1.18","DOIUrl":"https://doi.org/10.5573/jsts.2024.24.1.18","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2024-02-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140414203","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-02-29DOI: 10.5573/jsts.2024.24.1.33
Myeongho Park, Kichan Kim, Seungyeon Oh, Il-Hwan Cho
{"title":"Analysis of High Temperature Characteristics of Double Gate Feedback Field Effect Transistor","authors":"Myeongho Park, Kichan Kim, Seungyeon Oh, Il-Hwan Cho","doi":"10.5573/jsts.2024.24.1.33","DOIUrl":"https://doi.org/10.5573/jsts.2024.24.1.33","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2024-02-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140410854","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-02-29DOI: 10.5573/jsts.2024.24.1.47
Seongjae Cho, Sung-Tae Lee, Soomin Kim, Hyungcheol Shin
{"title":"A More Practical Indicator of MAC Operational Power Efficiency inside Memory-based Synapse Array","authors":"Seongjae Cho, Sung-Tae Lee, Soomin Kim, Hyungcheol Shin","doi":"10.5573/jsts.2024.24.1.47","DOIUrl":"https://doi.org/10.5573/jsts.2024.24.1.47","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2024-02-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140411293","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-02-29DOI: 10.5573/jsts.2024.24.1.55
Byungjun Kim, Han-Gyeol Mun, Shinwoong Kim, JongMin Lee, Jae-Yoon Sim
{"title":"A 1.03MOPS/W Lattice-based Post-quantum Cryptography Processor for IoT Devices","authors":"Byungjun Kim, Han-Gyeol Mun, Shinwoong Kim, JongMin Lee, Jae-Yoon Sim","doi":"10.5573/jsts.2024.24.1.55","DOIUrl":"https://doi.org/10.5573/jsts.2024.24.1.55","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2024-02-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140413907","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-02-29DOI: 10.5573/jsts.2024.24.1.25
Shogo Maeda, K. Shinohara, M. Empizo, Nobuhiko Sarukura, M. Kuzuhara, Akio Yamamoto, J. Asubar, S. Kawabata, I. Nagase, A. Baratov, Masaki Ishiguro, Toi Nezu, T. Igarashi, Kishi Sekiyama, S. Terai
{"title":"Improved Performance of Normally-off GaN-based MIS-HEMTs with Recessed-gate and Ultrathin Regrown AlGaN Barrier","authors":"Shogo Maeda, K. Shinohara, M. Empizo, Nobuhiko Sarukura, M. Kuzuhara, Akio Yamamoto, J. Asubar, S. Kawabata, I. Nagase, A. Baratov, Masaki Ishiguro, Toi Nezu, T. Igarashi, Kishi Sekiyama, S. Terai","doi":"10.5573/jsts.2024.24.1.25","DOIUrl":"https://doi.org/10.5573/jsts.2024.24.1.25","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2024-02-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140415061","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-02-29DOI: 10.5573/jsts.2024.24.1.8
H.I. Byun, Safdar Jamil, Junghyun Ryu, Sung-Soon Park, Myungcheol Lee, Sung-Soon Park, Youngjae Kim
{"title":"Provisioning CSD-based Storage Systems with Erasure-coding Offloaded to the CSD","authors":"H.I. Byun, Safdar Jamil, Junghyun Ryu, Sung-Soon Park, Myungcheol Lee, Sung-Soon Park, Youngjae Kim","doi":"10.5573/jsts.2024.24.1.8","DOIUrl":"https://doi.org/10.5573/jsts.2024.24.1.8","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2024-02-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140414125","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-02-29DOI: 10.5573/jsts.2024.24.1.1
Minjeong Ryu, Woo-Young Choi
{"title":"Surface Stoichiometry Dependence of Ambipolar SiGe Tunnel Field-effect Transistors and Its Effect on the Transient Performance Improvement","authors":"Minjeong Ryu, Woo-Young Choi","doi":"10.5573/jsts.2024.24.1.1","DOIUrl":"https://doi.org/10.5573/jsts.2024.24.1.1","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2024-02-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140416876","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-02-29DOI: 10.5573/jsts.2024.24.1.41
Bongsu Kim, Seung-Myeong Yu, Jongchan An, Gwangmyeong An, Junyoung Song
{"title":"A High Power Supply Rejection and Fast-transient LDO with Feed-forward Compensation using Current Sensing Technique","authors":"Bongsu Kim, Seung-Myeong Yu, Jongchan An, Gwangmyeong An, Junyoung Song","doi":"10.5573/jsts.2024.24.1.41","DOIUrl":"https://doi.org/10.5573/jsts.2024.24.1.41","url":null,"abstract":"","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.4,"publicationDate":"2024-02-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140410031","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-10-31DOI: 10.5573/jsts.2023.23.5.322
Ji-Hoon Jang, Jin Shin, Jun-Tae Park, In-Seong Hwang, Hyun Kim
Processing-in-Memory (PIM) is an emerging computing architecture that has gained significant attention in recent times. It aims to maximize data movement efficiency by moving away from the traditional von Neumann architecture. PIM is particularly well-suited for handling deep neural networks (DNNs) that require significant data movement between the processing unit and the memory device. As a result, there has been substantial research in this area. To optimally handle DNNs with diverse structures and inductive biases, such as convolutional neural networks, graph convolutional networks, recurrent neural networks, and transformers, within a PIM architecture, careful consideration should be given to how data mapping and data flow are processed in PIM. This paper aims to provide insight into these aspects by analyzing the characteristics of various DNNs and providing detailed explanations of how they have been implemented with PIM architectures using commercially available memory technologies like DRAM and next-generation memory technologies like ReRAM.
{"title":"In-depth Survey of Processing-in-memory Architectures for Deep Neural Networks","authors":"Ji-Hoon Jang, Jin Shin, Jun-Tae Park, In-Seong Hwang, Hyun Kim","doi":"10.5573/jsts.2023.23.5.322","DOIUrl":"https://doi.org/10.5573/jsts.2023.23.5.322","url":null,"abstract":"Processing-in-Memory (PIM) is an emerging computing architecture that has gained significant attention in recent times. It aims to maximize data movement efficiency by moving away from the traditional von Neumann architecture. PIM is particularly well-suited for handling deep neural networks (DNNs) that require significant data movement between the processing unit and the memory device. As a result, there has been substantial research in this area. To optimally handle DNNs with diverse structures and inductive biases, such as convolutional neural networks, graph convolutional networks, recurrent neural networks, and transformers, within a PIM architecture, careful consideration should be given to how data mapping and data flow are processed in PIM. This paper aims to provide insight into these aspects by analyzing the characteristics of various DNNs and providing detailed explanations of how they have been implemented with PIM architectures using commercially available memory technologies like DRAM and next-generation memory technologies like ReRAM.","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136017536","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-10-31DOI: 10.5573/jsts.2023.23.5.283
Dongchan Lee, Sanghyun Lee, Mannhee Cho, Hyung-Min Lee, Youngmin Kim
Field programmable gate arrays (FPGA) are commonly used in modern electronic applications, such as home appliances, automobiles, aerospace applications, and Internet of Things (IoT). However, security research is still insufficient compared to the rapidly developing design using FPGA. Attackers frequently attempt to hack into the vulnerable security of FPGA and introduce malicious codes, such as trojan. To defend against these attacks, it is necessary to determine the structure of FPGA accurately and study hackers
{"title":"Security Problems of Latest FPGAs and Reverse Engineering Methods of Xilinx 7-series FPGAs","authors":"Dongchan Lee, Sanghyun Lee, Mannhee Cho, Hyung-Min Lee, Youngmin Kim","doi":"10.5573/jsts.2023.23.5.283","DOIUrl":"https://doi.org/10.5573/jsts.2023.23.5.283","url":null,"abstract":"Field programmable gate arrays (FPGA) are commonly used in modern electronic applications, such as home appliances, automobiles, aerospace applications, and Internet of Things (IoT). However, security research is still insufficient compared to the rapidly developing design using FPGA. Attackers frequently attempt to hack into the vulnerable security of FPGA and introduce malicious codes, such as trojan. To defend against these attacks, it is necessary to determine the structure of FPGA accurately and study hackers","PeriodicalId":17067,"journal":{"name":"Journal of Semiconductor Technology and Science","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136018052","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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