Positive feedback field effect transistor based on vertical NAND flash structure for in-memory computing

Abstract

The distance between memory and central processing unit (CPU) has led to a memory wall. To solve it, an in-memory technology that performs both memory and computation has been studied. To realize an ideal in-memory computing, we propose a positive feedback field effect transistor (FBFET) based on vertical NAND flash structure that can act as a memory and perform computation. The device can reconfigure the processing operations into AND or OR operations depending on the control gate bias. It performs memory by accumulating charge in the body, and logic operations can be performed by reading data stored in the charge trap layer. After this, it can also perform a writing operation. This component enables memory and read-compute-write operations, making it capable of implementing intrinsic in-memory computing. As a result, in this study, we designed and verified a structure that implements the core principles of in-memory computing.