Impact of passivation layer on the subthreshold behavior of p-type CuO accumulation-mode thin-film transistors

IF 1.4 4区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Solid-state Electronics Pub Date : 2024-02-13 DOI:10.1016/j.sse.2024.108878
Qi Chen, Xi Zeng, Denis Flandre
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Abstract

In this work, models of p-type CuO metal-oxide- semiconductor (MOS) capacitor and thin-film transistors (TFTs) are established using numerical simulation tools and compared with experimental data, to investigate the impact of a passivation layer on the TFT subthreshold behavior. Simulated transfer curves and hole concentrations of back-gated CuO TFT with 10 μm channel length confirm the experimental observation of buried-channel and accumulation-mode conduction mechanisms. The subthreshold behavior is analyzed with HfO2 passivation on the top CuO surface varying the densities of fixed oxide charge and interface states, as well as the thickness of the CuO film. The simulation results demonstrate a significant potential improvement of the subthreshold slope and on/off current ratio, mainly thanks to the optimization of the fixed oxide charge densities.

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钝化层对 p 型氧化铜积层模式薄膜晶体管阈下行为的影响
这项研究利用数值模拟工具建立了 p 型氧化铜金属氧化物半导体(MOS)电容器和薄膜晶体管(TFT)的模型,并与实验数据进行了比较,以研究钝化层对 TFT 亚阈值行为的影响。具有 10 μm 沟道长度的背栅氧化铜 TFT 的模拟传输曲线和空穴浓度证实了实验观察到的埋没沟道和累积模式传导机制。通过改变固定氧化物电荷和界面态的密度以及氧化铜薄膜的厚度,分析了在顶部氧化铜表面钝化 HfO2 的情况下的阈下行为。模拟结果表明,主要由于固定氧化物电荷密度的优化,亚阈值斜率和开/关电流比有了显著改善。
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来源期刊
Solid-state Electronics
Solid-state Electronics 物理-工程:电子与电气
CiteScore
3.00
自引率
5.90%
发文量
212
审稿时长
3 months
期刊介绍: It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.
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