Impact of work function metal stacks on the performance and reliability of multi-Vth RMG CMOS technology

Abstract

Multi-V_th CMOS device technologies have become standard for System-on-Chip designs. In Replacement Gate technologies, distinct device V_th’s are achieved by deploying different work function metal stacks, and thus concerns exist about the possible chemical interaction of different gate metals with the underlying dielectrics potentially affecting the device performance and reliability. We present a comprehensive study, comprising both electrical measurements and simulations, carried out on a planar transistor platform with state-of-the-art gate stacks. Two different metal stacks are deployed to fabricate low-V_th and ultra-high V_th pMOS and nMOS device flavors. The study provides fundamental insights on the impact of TiAl-based gate metal on EOT, gate leakage, interface quality, carrier mobility, short channel performance, PBTI and NBTI reliability.