Georges Pananakakis, Gérard Ghibaudo, Sorin Cristoloveanu
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引用次数: 0
Abstract
The threshold voltage definition and measurement in ultrathin FD-SOI MOS transistors are revisited by comparing theoretical and pragmatic extraction techniques, including novel approaches. The respective merits and limitations of methods based on the monitoring of the potential, mobile charge, gate-to-channel capacitance and drain current are emphasized. Back-gate biasing, thickness-induced quantization, potential fluctuations and surface roughness can enhance the disparity between various extraction methods. The origin of these deviations is clarified.
期刊介绍：
It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.
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