{"title":"A novel jittered‐carrier phase‐shifted sine pulse width modulation for cascaded H‐bridge converter","authors":"Dan Luo, Dong Lin, Wenzhong Zhang, Wenwu Lian","doi":"10.1049/tje2.12391","DOIUrl":null,"url":null,"abstract":"Carrier phase‐shifted sine pulse width modulation is a common modulation strategy for medium‐ and low‐voltage cascaded H‐bridges (CHB). This paper proposes a novel jittered‐carrier phase‐shifted sine pulse width modulation (JCPS‐SPWM) to reduce the total harmonic distortion (THD) of the converter. It makes the carrier jitter regularly while the total switching times remain unchanged, which reduces the THD of the bridge arm voltage and current by moving the low‐order output harmonics of the bridge arm voltage and current to filterable high‐order harmonics. Since the total number of switching times remains unchanged, this modulation strategy will not cause any increase in switching loss. A seven‐level CHB simulation model and an experimental prototype are built to verify the effectiveness of the approach. The results show that harmonic content can be reduced by 47.5% compared with the traditional method, thus verifying the effectiveness of the JCPS‐SPWM.","PeriodicalId":22858,"journal":{"name":"The Journal of Engineering","volume":"26 9","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2024-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"The Journal of Engineering","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1049/tje2.12391","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Carrier phase‐shifted sine pulse width modulation is a common modulation strategy for medium‐ and low‐voltage cascaded H‐bridges (CHB). This paper proposes a novel jittered‐carrier phase‐shifted sine pulse width modulation (JCPS‐SPWM) to reduce the total harmonic distortion (THD) of the converter. It makes the carrier jitter regularly while the total switching times remain unchanged, which reduces the THD of the bridge arm voltage and current by moving the low‐order output harmonics of the bridge arm voltage and current to filterable high‐order harmonics. Since the total number of switching times remains unchanged, this modulation strategy will not cause any increase in switching loss. A seven‐level CHB simulation model and an experimental prototype are built to verify the effectiveness of the approach. The results show that harmonic content can be reduced by 47.5% compared with the traditional method, thus verifying the effectiveness of the JCPS‐SPWM.