{"title":"A 94-GHz Dual-Polarized 1-D Series-Fed Phased Array Antenna With Low Sidelobe Level Based on Multilayer Coreless ABF Substrates","authors":"Ding Wang;Chen Hui Xia;Yong Fan;Yu Jian Cheng","doi":"10.1109/TCPMT.2024.3429168","DOIUrl":null,"url":null,"abstract":"This article introduces a 94-GHz dual-polarized 1-D beamforming patch antenna array, specifically designed to achieve low sidelobe levels (SLLs) and an extensive scanning range. The array, in a \n<inline-formula> <tex-math>$4\\times 8$ </tex-math></inline-formula>\n configuration, is capable of 1-D expansion and utilizes Ajinomoto build-up film (ABF) substrates alongside a precision electroplating process. This combination ensures high accuracy and fulfills the miniaturization demands for 94-GHz operations. A notable achievement of this research is the design of a compact power divider using a coupling line with short end, which establishes a large power dividing ratio. This design is pivotal in maintaining consistently low SLLs, typically below −18.2 dB and often below −20 dB, over the \n<inline-formula> <tex-math>$92\\sim 96$ </tex-math></inline-formula>\n-GHz bandwidth within a \n<inline-formula> <tex-math>$1\\times 8$ </tex-math></inline-formula>\n linear array. In addition, the array’s transverse profile is optimized by altering the feeder angle, decreasing the distance between linear arrays to \n<inline-formula> <tex-math>$0.52\\lambda _{0}$ </tex-math></inline-formula>\n, where \n<inline-formula> <tex-math>$\\lambda _{0}$ </tex-math></inline-formula>\n denotes the free-space wavelength at 94 GHz. The proposed \n<inline-formula> <tex-math>$4\\times 8$ </tex-math></inline-formula>\n array design facilitates beam steering up to ±45° without grating lobes. The construction and experiments of the dual-polarized array antenna at 94.0 GHz validate its effectiveness, confirming the achievement of low SLL and extensive scanning capabilities in both polarizations.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"14 9","pages":"1638-1648"},"PeriodicalIF":2.3000,"publicationDate":"2024-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Components, Packaging and Manufacturing Technology","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10599494/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This article introduces a 94-GHz dual-polarized 1-D beamforming patch antenna array, specifically designed to achieve low sidelobe levels (SLLs) and an extensive scanning range. The array, in a
$4\times 8$
configuration, is capable of 1-D expansion and utilizes Ajinomoto build-up film (ABF) substrates alongside a precision electroplating process. This combination ensures high accuracy and fulfills the miniaturization demands for 94-GHz operations. A notable achievement of this research is the design of a compact power divider using a coupling line with short end, which establishes a large power dividing ratio. This design is pivotal in maintaining consistently low SLLs, typically below −18.2 dB and often below −20 dB, over the
$92\sim 96$
-GHz bandwidth within a
$1\times 8$
linear array. In addition, the array’s transverse profile is optimized by altering the feeder angle, decreasing the distance between linear arrays to
$0.52\lambda _{0}$
, where
$\lambda _{0}$
denotes the free-space wavelength at 94 GHz. The proposed
$4\times 8$
array design facilitates beam steering up to ±45° without grating lobes. The construction and experiments of the dual-polarized array antenna at 94.0 GHz validate its effectiveness, confirming the achievement of low SLL and extensive scanning capabilities in both polarizations.
期刊介绍:
IEEE Transactions on Components, Packaging, and Manufacturing Technology publishes research and application articles on modeling, design, building blocks, technical infrastructure, and analysis underpinning electronic, photonic and MEMS packaging, in addition to new developments in passive components, electrical contacts and connectors, thermal management, and device reliability; as well as the manufacture of electronics parts and assemblies, with broad coverage of design, factory modeling, assembly methods, quality, product robustness, and design-for-environment.