{"title":"Novel superjunction Fin-based NiO/β-Ga2O3 HJFET with additional surface drift region channels for record-high performance","authors":"","doi":"10.1016/j.mejo.2024.106325","DOIUrl":null,"url":null,"abstract":"<div><p>—In this paper, a novel superjunction fin-based NiO/β-Ga<sub>2</sub>O<sub>3</sub> heterojunction field-effect transistor (SJ Fin-HJFET) is proposed and studied by simulations. Compared with the conventional Ga<sub>2</sub>O<sub>3</sub> SJ FinFET, Ga<sub>2</sub>O<sub>3</sub> SJ Fin-HJFET can generate surface conduction channels instead of depletion zones near the p-n junction interface in the SJ drift region. The additional surface conduction channel significantly improves the specific on-resistance of the SJ Fin-HJFET (from 1.091 mΩ cm<sup>2</sup> to 0.397 mΩ cm<sup>2</sup>, reduced by 63.6 %) and dramatically improves the Baliga figure of merit (BFOM, form 11.75 GW/cm<sup>2</sup> to 32.28 GW/cm<sup>2</sup>) at the same breakdown voltage (3580 V). The effect of different conduction band offset (Δ<em>E</em><sub>C</sub>) on the performance of the SJ Fin-HJFET is also investigated. The simulation results show that the on-resistance advantage of the SJ Fin-HJFET applies to a wide range of Δ<em>E</em><sub>C</sub>, exhibiting strong applicability and stability. These results indicate that the SJ Fin-HJFET has record-high performance and promising application prospects.</p></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":null,"pages":null},"PeriodicalIF":1.9000,"publicationDate":"2024-07-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1879239124000298","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
—In this paper, a novel superjunction fin-based NiO/β-Ga2O3 heterojunction field-effect transistor (SJ Fin-HJFET) is proposed and studied by simulations. Compared with the conventional Ga2O3 SJ FinFET, Ga2O3 SJ Fin-HJFET can generate surface conduction channels instead of depletion zones near the p-n junction interface in the SJ drift region. The additional surface conduction channel significantly improves the specific on-resistance of the SJ Fin-HJFET (from 1.091 mΩ cm2 to 0.397 mΩ cm2, reduced by 63.6 %) and dramatically improves the Baliga figure of merit (BFOM, form 11.75 GW/cm2 to 32.28 GW/cm2) at the same breakdown voltage (3580 V). The effect of different conduction band offset (ΔEC) on the performance of the SJ Fin-HJFET is also investigated. The simulation results show that the on-resistance advantage of the SJ Fin-HJFET applies to a wide range of ΔEC, exhibiting strong applicability and stability. These results indicate that the SJ Fin-HJFET has record-high performance and promising application prospects.
期刊介绍:
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc.
Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.