ΔΣ Modulators Employing MASH DSM DAC-Based Dual Quantization

Abstract

Multibit (MB) quantization allows high resolution Delta-Sigma modulators (DSMs) with low oversampling ratio (OSR). Furthermore, it allows higher maximum stable amplitude (MSA), achieves reduced jitter sensitivity, and relaxes the dynamic requirements on the DSM loop-filter (LF). However, MB quantization adds a dominant source of non-linearity due to element mismatch in the MB digital-to-analog converter (DAC) which often dominates the performance. State of the art (SoA) presents many calibration techniques, though digital power and area consumption can be high and calibration time be significant. In this paper we target a calibration-free DAC based on dual quantization and propose to employ a Multistage noise SHaping (MASH) Digital-DSM (DDSM) to avoid architectural compromises between the main DSM LF and the DDSM DAC. The implementation trade-offs are illustrated, and stability constraints in both the main LF and the DDSM are addressed. An exemplary implementation is derived and simulated, and the results shall lay the foundation for future circuit implementations of MASH DDSM to realize MB DSM with intrinsically high linearity.