A Multifault Testing Method for TSVs Based on GAF-DRSN and Mirror Constant Current Source Structure

IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2024-09-09 DOI:10.1109/TCPMT.2024.3456228
Yuling Shang;Longlu Geng;Chunquan Li;Zhuofan Song;Gefei Duan;Jintao Zhang;Junji Li
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Abstract

Three-dimensional stacked integration based on through-silicon via (TSV) meets the high-speed development requirements of integrated circuits (ICs). However, TSV is a sensitive unit prone to manufacturing defects, with common faults being void faults and leakage faults. When TSV exhibits multifault, such as simultaneous resistive void fault and current leakage fault, the reliability of 3-D ICs is significantly reduced compared to single faults. To address this, this article proposes a TSV multifault testing method based on a Gramian angular field (GAF), deep residual shrinking network (DRSN), and a mirror constant current source structure. The mirror constant current source circuit is initially designed in the method, with the load structure being TSV and TSV charge/discharge rates are measured as testing parameters. Then, the GAF is employed to transform the acquired charge/discharge signals into 2-D images. Ultimately, the DRSN model should be applied to precisely detect faults in the transformed TSV images representing different fault types. The results demonstrate the effectiveness of the proposed method in classifying TSV fault types, with an average accuracy exceeding 98%. The method exhibits notable advantages, including high accuracy and robust generalization capabilities.
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基于 GAF-DRSN 和镜像恒流源结构的 TSV 多故障测试方法
基于硅通孔(TSV)的三维堆叠集成满足了集成电路(IC)的高速发展要求。然而,TSV 是一个易受制造缺陷影响的敏感单元,常见的故障有空洞故障和漏电故障。当 TSV 出现多重故障(如同时出现电阻空洞故障和电流泄漏故障)时,三维集成电路的可靠性会比单一故障显著降低。针对这一问题,本文提出了一种基于格拉米安角场(GAF)、深残余收缩网络(DRSN)和镜像恒流源结构的 TSV 多重故障测试方法。该方法初步设计了镜像恒流源电路,负载结构为 TSV,测试参数为 TSV 充放电速率。然后,利用 GAF 将获取的充放电信号转换为二维图像。最后,应用 DRSN 模型精确检测转换后 TSV 图像中代表不同故障类型的故障。结果表明,所提出的方法能有效地对 TSV 故障类型进行分类,平均准确率超过 98%。该方法具有显著的优势,包括高精确度和强大的泛化能力。
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来源期刊
IEEE Transactions on Components, Packaging and Manufacturing Technology
IEEE Transactions on Components, Packaging and Manufacturing Technology ENGINEERING, MANUFACTURING-ENGINEERING, ELECTRICAL & ELECTRONIC
CiteScore
4.70
自引率
13.60%
发文量
203
审稿时长
3 months
期刊介绍: IEEE Transactions on Components, Packaging, and Manufacturing Technology publishes research and application articles on modeling, design, building blocks, technical infrastructure, and analysis underpinning electronic, photonic and MEMS packaging, in addition to new developments in passive components, electrical contacts and connectors, thermal management, and device reliability; as well as the manufacture of electronics parts and assemblies, with broad coverage of design, factory modeling, assembly methods, quality, product robustness, and design-for-environment.
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