Yuling Shang;Longlu Geng;Chunquan Li;Zhuofan Song;Gefei Duan;Jintao Zhang;Junji Li
{"title":"A Multifault Testing Method for TSVs Based on GAF-DRSN and Mirror Constant Current Source Structure","authors":"Yuling Shang;Longlu Geng;Chunquan Li;Zhuofan Song;Gefei Duan;Jintao Zhang;Junji Li","doi":"10.1109/TCPMT.2024.3456228","DOIUrl":null,"url":null,"abstract":"Three-dimensional stacked integration based on through-silicon via (TSV) meets the high-speed development requirements of integrated circuits (ICs). However, TSV is a sensitive unit prone to manufacturing defects, with common faults being void faults and leakage faults. When TSV exhibits multifault, such as simultaneous resistive void fault and current leakage fault, the reliability of 3-D ICs is significantly reduced compared to single faults. To address this, this article proposes a TSV multifault testing method based on a Gramian angular field (GAF), deep residual shrinking network (DRSN), and a mirror constant current source structure. The mirror constant current source circuit is initially designed in the method, with the load structure being TSV and TSV charge/discharge rates are measured as testing parameters. Then, the GAF is employed to transform the acquired charge/discharge signals into 2-D images. Ultimately, the DRSN model should be applied to precisely detect faults in the transformed TSV images representing different fault types. The results demonstrate the effectiveness of the proposed method in classifying TSV fault types, with an average accuracy exceeding 98%. The method exhibits notable advantages, including high accuracy and robust generalization capabilities.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"14 10","pages":"1744-1752"},"PeriodicalIF":2.3000,"publicationDate":"2024-09-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Components, Packaging and Manufacturing Technology","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10669625/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
Three-dimensional stacked integration based on through-silicon via (TSV) meets the high-speed development requirements of integrated circuits (ICs). However, TSV is a sensitive unit prone to manufacturing defects, with common faults being void faults and leakage faults. When TSV exhibits multifault, such as simultaneous resistive void fault and current leakage fault, the reliability of 3-D ICs is significantly reduced compared to single faults. To address this, this article proposes a TSV multifault testing method based on a Gramian angular field (GAF), deep residual shrinking network (DRSN), and a mirror constant current source structure. The mirror constant current source circuit is initially designed in the method, with the load structure being TSV and TSV charge/discharge rates are measured as testing parameters. Then, the GAF is employed to transform the acquired charge/discharge signals into 2-D images. Ultimately, the DRSN model should be applied to precisely detect faults in the transformed TSV images representing different fault types. The results demonstrate the effectiveness of the proposed method in classifying TSV fault types, with an average accuracy exceeding 98%. The method exhibits notable advantages, including high accuracy and robust generalization capabilities.
期刊介绍:
IEEE Transactions on Components, Packaging, and Manufacturing Technology publishes research and application articles on modeling, design, building blocks, technical infrastructure, and analysis underpinning electronic, photonic and MEMS packaging, in addition to new developments in passive components, electrical contacts and connectors, thermal management, and device reliability; as well as the manufacture of electronics parts and assemblies, with broad coverage of design, factory modeling, assembly methods, quality, product robustness, and design-for-environment.