Novel Latin square matrix code of large burst error correction for MRAM applications

IF 1.6 4区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Microelectronics Reliability Pub Date : 2024-09-18 DOI:10.1016/j.microrel.2024.115505

Hui Jin , Xiaoyang Xu , Zhaohao Wang , Siyu Chen , Jing Guo , Bi Wang

引用次数: 0

Abstract

With the scaling down of the technology node of complementary metal–oxide–semiconductor (CMOS) , the bit error rate (BER) of magnetic random memory (MRAM) seriously threats the reliability, especially multiple-cell upset (MBUs). Error correction codes (ECCs) such as one-step majority logic decodable (OS-MLD) codes are proposed with strong error correction capabilities, and efficient hardware overhead. However, the OS-MLD codes are not suitable for the burst error correction, which require more redundancy bits or extra memory cells. A novel m order Latin square matrix (LSM) codes for MRAM are presented, which can provide fewer equivalent bits and more flexible adjustments for correcting large burst errors. The 5-bit LSM code area is only 90898.71 $μ m^{2}$ , and the power consumption is only 0.82 mw.

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用于 MRAM 应用的新型大突发纠错拉丁平方矩阵码

随着互补金属氧化物半导体（CMOS）技术节点的缩小，磁性随机存储器（MRAM）的误码率（BER）严重威胁着其可靠性，尤其是多单元存储器（MBU）。人们提出的纠错码（ECC），如一步多数逻辑可解码（OS-MLD）码，具有强大的纠错能力和高效的硬件开销。然而，OS-MLD 编码不适合突发纠错，因为突发纠错需要更多冗余比特或额外的存储单元。本文提出了一种适用于 MRAM 的新型 m 阶拉丁平方矩阵 (LSM) 代码，它能提供更少的等效比特和更灵活的调整，以纠正大量突发错误。5 位 LSM 代码面积仅为 90898.71 μm2，功耗仅为 0.82 mw。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Microelectronics Reliability 工程技术-工程：电子与电气

CiteScore

3.30

自引率

12.50%

发文量

342

审稿时长

68 days

期刊介绍： Microelectronics Reliability, is dedicated to disseminating the latest research results and related information on the reliability of microelectronic devices, circuits and systems, from materials, process and manufacturing, to design, testing and operation. The coverage of the journal includes the following topics: measurement, understanding and analysis; evaluation and prediction; modelling and simulation; methodologies and mitigation. Papers which combine reliability with other important areas of microelectronics engineering, such as design, fabrication, integration, testing, and field operation will also be welcome, and practical papers reporting case studies in the field and specific application domains are particularly encouraged. Most accepted papers will be published as Research Papers, describing significant advances and completed work. Papers reviewing important developing topics of general interest may be accepted for publication as Review Papers. Urgent communications of a more preliminary nature and short reports on completed practical work of current interest may be considered for publication as Research Notes. All contributions are subject to peer review by leading experts in the field.