Soft error analysis on junctionless ringFET structures and junctionless ringFET-based inverter circuits using numerical device modeling

Abstract

The performance of junctionless ringFETs under heavy ion irradiation is investigated utilizing 3D TCAD simulations. The vulnerable location of the ringFET device is identified by conducting a single-event transient analysis on the interaction of an ionizing particle, particularly a heavy ion, with various LET values. The analysis focused on both the inner and outer drain configurations. The drain region is the most vulnerable location in an inner drain configuration, whereas the channel near the drain region is the most vulnerable location in an outer drain configuration of a junctionless ringFET. The source region of a junctionless ringFET is the least vulnerable location in both the inner and outer drain configurations. An Inverter circuit built using junctionless ringFETs utilizing inner and outer drain configurations is also subjected to single-event transient analysis. The junctionless ringFET with an inner drain configuration is better for use in areas where radiation is a concern since its collected charge is lower than that of the outer drain configuration.