Reliability optimization of dopant-free TFET performance through advanced metal layer techniques

Abstract

To address the low ON-current and reliability issues of dopant-free TFETs, we have incorporated a metal-layer near the source/channel (S/C) interface. The use of this metal layer facilitates a larger flow of electrons near the junction, which helps the ON-current ($I_{ON}$) exceed 10⁻⁴ A/$\mu m$ under lower biasing conditions. This enhancement in $I_{ON}$ improves various performance metrics in analog, RF, and linearity applications. Furthermore to assess dependability, we analyzed the impact of acceptor and donor charges on the DL-MS-TFET, focusing on trap effects near interface (ITCs). The results reveal that the presence of these trap charges significantly affects the flat-band voltage, leading to reduced variations in the performance of DL-MS-TFETs. Furthermore, we observed the influence of the metal strip work function on DC performance characteristics. A noticeable decrease in ON-current was found as the metal layer work function increased. Overall, the MS-dopant-free TFET demonstrates superior performance in the presence of ITCs, making it suitable for low-voltage and analog-RF applications.