A 1-V 3.9–5.2-GHz reference-sampling PLL with 168-fsrms integrated jitter and −76-dBc reference spur

IF 1.9 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Microelectronics Journal Pub Date : 2024-11-14 DOI:10.1016/j.mejo.2024.106483

Feng Bu , Ruixue Ding , Depeng Sun , Yuan Gao , Ruiqing Wang , Xiaoteng Zhao , Rong Zhou , Shubin Liu

引用次数: 0

Abstract

This letter presents a low-voltage (LV), low-jitter reference-sampling phase-locked loop (RSPLL), which can achieve sub-200-fs jitter performance with a 1-V supply voltage. With the proposed level-shift-up reference-sampling phase detector (RSPD), the on-resistance of sample and hold (SH) switches is reduced, and it ensures the integrity of the reference signal. Fabricated in the 180-nm RF CMOS process, the area of the chip is about 445 × 775

μ

m². The proposed RSPLL can achieve −135-dBc/Hz@10 MHz phase noise and −76.15-dBc reference spur at 4.58 GHz with 1-V supply voltage. The rms jitter is 168.3 fs integrated from 10 kHz to 100 MHz, and the power consumption is 9.66 mW.

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1 V 3.9-5.2 GHz 基准采样 PLL，具有 168-fsrms 集成抖动和 -76-dBc 基准杂散

本文介绍了一种低电压（LV）、低抖动参考采样锁相环（RSPLL），它能在 1 V 电源电压下实现低于 200 fs 的抖动性能。利用所提出的电平上移参考采样相位检测器（RSPD），降低了采样和保持（SH）开关的导通电阻，确保了参考信号的完整性。芯片采用 180 纳米射频 CMOS 工艺制造，面积约为 445 × 775 μ m2。在 1 V 电源电压下，所提出的 RSPLL 可在 4.58 GHz 频率下实现 -135 dBc/Hz@10 MHz 的相位噪声和 -76.15 dBc 的参考杂散。从 10 kHz 到 100 MHz 的均方根抖动为 168.3 fs，功耗为 9.66 mW。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Microelectronics Journal 工程技术-工程：电子与电气

CiteScore

4.00

自引率

27.30%

发文量

222

审稿时长

43 days

期刊介绍： Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.