Utilizing MRAMs With Low Resistance and Limited Dynamic Range for Efficient MAC Accelerator

IF 1.8 Q3 MATERIALS SCIENCE, MULTIDISCIPLINARY IEEE Open Journal of Nanotechnology Pub Date : 2024-11-18 DOI:10.1109/OJNANO.2024.3501293
Sateesh;Kaustubh Chakarwar;Shubham Sahay
{"title":"Utilizing MRAMs With Low Resistance and Limited Dynamic Range for Efficient MAC Accelerator","authors":"Sateesh;Kaustubh Chakarwar;Shubham Sahay","doi":"10.1109/OJNANO.2024.3501293","DOIUrl":null,"url":null,"abstract":"The recent advancements in data mining, machine learning algorithms and cognitive systems have necessitated the development of neuromorphic processing engines which may enable resource and computationally intensive applications on the internet-of-Things (IoT) edge devices with unprecedented energy efficiency. Spintronics based magnetic memory devices can emulate synaptic behavior efficiently and are hailed as one of the most promising candidates for realizing compact and ultra-energy efficient neural network accelerators. Although ultra-dense magnetic memories with multi-bit capability (MLC) were proposed recently, their application in hybrid CMOS-non-volatile memory accelerators is limited due to their low dynamic range (memory window) and high cell currents (ON/OFF-state resistance in ∼kΩ). In this work, we propose a novel supercell to enable the use of MLC MRAMs for neuromorphic multiply-accumulate (MAC) accelerators. For proof-of-concept demonstration, we exploit an MLC MRAM based on c-MTJ for realizing a highly scalable 2-FinFET-1-MRAM supercell with large dynamic range, low supercell currents and high endurance. Furthermore, we perform a comprehensive design exploration of a time-domain MAC accelerator utilizing the proposed supercell. Our detailed analysis using the ASAP7 PDK from ARM for FinFETs and an experimentally calibrated compact model for c-MTJ-based MRAM indicates the possibility of realizing a significantly high energy-efficiency of 87.4 TOPS/W and a throughput of 2.5 TOPS for a 200×200 MAC operation with 4-bit precision.","PeriodicalId":446,"journal":{"name":"IEEE Open Journal of Nanotechnology","volume":"5 ","pages":"141-148"},"PeriodicalIF":1.8000,"publicationDate":"2024-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10756528","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Open Journal of Nanotechnology","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10756528/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"MATERIALS SCIENCE, MULTIDISCIPLINARY","Score":null,"Total":0}
引用次数: 0

Abstract

The recent advancements in data mining, machine learning algorithms and cognitive systems have necessitated the development of neuromorphic processing engines which may enable resource and computationally intensive applications on the internet-of-Things (IoT) edge devices with unprecedented energy efficiency. Spintronics based magnetic memory devices can emulate synaptic behavior efficiently and are hailed as one of the most promising candidates for realizing compact and ultra-energy efficient neural network accelerators. Although ultra-dense magnetic memories with multi-bit capability (MLC) were proposed recently, their application in hybrid CMOS-non-volatile memory accelerators is limited due to their low dynamic range (memory window) and high cell currents (ON/OFF-state resistance in ∼kΩ). In this work, we propose a novel supercell to enable the use of MLC MRAMs for neuromorphic multiply-accumulate (MAC) accelerators. For proof-of-concept demonstration, we exploit an MLC MRAM based on c-MTJ for realizing a highly scalable 2-FinFET-1-MRAM supercell with large dynamic range, low supercell currents and high endurance. Furthermore, we perform a comprehensive design exploration of a time-domain MAC accelerator utilizing the proposed supercell. Our detailed analysis using the ASAP7 PDK from ARM for FinFETs and an experimentally calibrated compact model for c-MTJ-based MRAM indicates the possibility of realizing a significantly high energy-efficiency of 87.4 TOPS/W and a throughput of 2.5 TOPS for a 200×200 MAC operation with 4-bit precision.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
求助全文
约1分钟内获得全文 去求助
来源期刊
CiteScore
3.90
自引率
17.60%
发文量
10
审稿时长
12 weeks
期刊最新文献
Pulsed Electromagnetic Field-Assisting Reduced Graphene Oxide-Incorporated Nanofibers for Osteogenic Differentiation of Human Dental Pulp Stem Cells Utilizing MRAMs With Low Resistance and Limited Dynamic Range for Efficient MAC Accelerator Colloidal Spin Ice Cellular Automata for Logic Design High-Performance Dielectric Modulated Epitaxial Tunnel Layer Tunnel FET for Label-Free Detection of Biomolecules Multitask Learning for Estimation of Magnetic Parameters Using Pattern Recognition
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1