Low-Frequency Noise Analysis of GSCG Double-Gate MOSFET in the Subthreshold Region

Abstract

This paper presents the noise analysis of double-gate MOSFETs with gate stacking and channel grading (GSCG). In particular, the low-frequency noise, flicker noise, or thermal noise power spectral densities are presented by varying different geometrical parameters of the device, such as the length and thickness of the channel (L and t_si, respectively), and the thickness of the gate-oxide and high-k insulating material (t₁ and t₂, respectively) in the subthreshold region. Prior to developing the mathematical formulations for flicker noise and thermal noise PSDs, we first propose the analytical models for drain current and inversion charge density. Published experimental results are used to validate the drain current model and flicker noise model (both normalized and unnormalized). The results obtained from the model show excellent matching with the experimental data. Our findings show that the effect of flicker noise decreases as the operating frequency increases. Owing to the reduced carrier mobility in the conducting channel and carrier scattering at the oxide–semiconductor interfaces of the proposed device, the device's performance can be enhanced by lowering the flicker noise level as the channel length and the thicknesses of both insulating materials (SiO₂ and HfO₂) increase. Similarly, the thermal noise PSD can be reduced by increasing the channel thickness. Our proposed device's flicker and thermal noise study in the subthreshold region points to a possible contender that can be employed for both analog/RF applications and a wide range of frequencies.