International Journal of Numerical Modelling-Electronic Networks Devices and Fields最新文献

In this work, we obtain analytical solutions via Laplace transform of fractional electrical circuits by using the proportional Caputo derivative with power law. Numerical simulations were obtained to see the impact of the memory concept represented by the fractional parameter order. Also, we collect a lot of experimental data obtained in our laboratory for an $��\mathrm{RC}�$ circuit, and for each case, we calculate the value of the fractional-order by using a particle swarm optimization approach. The results obtained reveals that the experimental data deviate slightly from that obtained in the integer-order behavior and the application of the proportional Caputo derivative best fits the experimental data.

The miniaturized dual-element triple broadband Multiple-Input-Multiple-Output (MIMO) antenna is suggested. By creating a partial ground plane beneath the triple snake-head-shaped patch, three wide bandwidths are achieved. The investigated −10 dB impedance bandwidths are 10.2–18.4 GHz, 23.6–29.4 GHz, and 33.4–59.4 GHz, with the fractional bandwidth (FBW) 57.34%, 21.88%, and 56%, respectively. The isolation is improved by joining the microstrip line between the antennas in partial ground plane. The diversity performance of MIMO antenna is examined by the computational analysis of mean effective gain (MEG), diversity gain (DG), total active reflection coefficient (TARC), envelope correlation coefficient (ECC), ergodic channel capacity (CC), and channel capacity loss (CCL). Prototyping of the suggested design is carried out on FR-4 dielectric substrate with electrical dimensions 0.524λ₀ × 0.715λ₀ mm² (where λ₀ is free space wavelength at center frequency of lowest operating band), dielectric constant 4.4, and loss tangent 0.02. The isolation, ECC, peak gain, average total efficiency, and average CC over the operating bands 10.2–18.4 GHz, 23.6–29.4 GHz, and 33.4–59.4 GHz are (−18.8 dB, 0.027, 4.50 dB, 50.81%, 9.46 bps/Hz), (21.4 dB, 0.057, 4.92 dB, 57.03%, 9.74 bps/Hz), and (−31.8 dB, 0.0082, 5.79 dB, 45.9%, 9.22 bps/Hz), respectively. The proposed design covers X (40%), Ku, K (37.7%), Ka (69.2%), and V (55.4%) frequency bands. A good agreement was found between the measurement and simulation.

This paper presents the noise analysis of double-gate MOSFETs with gate stacking and channel grading (GSCG). In particular, the low-frequency noise, flicker noise, or thermal noise power spectral densities are presented by varying different geometrical parameters of the device, such as the length and thickness of the channel (L and t_si, respectively), and the thickness of the gate-oxide and high-k insulating material (t₁ and t₂, respectively) in the subthreshold region. Prior to developing the mathematical formulations for flicker noise and thermal noise PSDs, we first propose the analytical models for drain current and inversion charge density. Published experimental results are used to validate the drain current model and flicker noise model (both normalized and unnormalized). The results obtained from the model show excellent matching with the experimental data. Our findings show that the effect of flicker noise decreases as the operating frequency increases. Owing to the reduced carrier mobility in the conducting channel and carrier scattering at the oxide–semiconductor interfaces of the proposed device, the device's performance can be enhanced by lowering the flicker noise level as the channel length and the thicknesses of both insulating materials (SiO₂ and HfO₂) increase. Similarly, the thermal noise PSD can be reduced by increasing the channel thickness. Our proposed device's flicker and thermal noise study in the subthreshold region points to a possible contender that can be employed for both analog/RF applications and a wide range of frequencies.

Specific characteristics of organic field-effect transistors (OFETs), including channel thickness, ON-current, OFF-current, SS, threshold voltage, and turn-on voltage, are influenced by the fabrication process. The design and realization of circuits based on OFETs demand their expertise and oversight. An OFET with palladium (Pd) source/drain (S/D) electrodes, NdTaNO as dielectric material, pentacene as the active layer, and the aluminum gate electrode is simulated using Silvaco TCAD. The device's performance parameters, such as drain current, threshold voltage, current on/off ratio, transconductance, and subthreshold slope, are analyzed for varying channel thickness from 10 to 100 nm. Overall improvement in I_ON and V_TH is observed with a decrease in t_ch value. Various fabrication factors, including the management of dewetting issues, tensile strain, and compressive stress in OSC films, which are closely related to the channel thickness of the device, require careful consideration to effectively prolong the operational lifespan of OFET devices. These issues primarily arise when the thickness of the OSC is either extremely minimal or excessively large. Such extremes can result in a reduced lifespan of the device and may compromise the overall performance of the circuit. Therefore, in the analysis presented in this paper, it was discovered that the optimal device conditions and satisfactory operational behavior are achieved at thickness (t_ch) values of 60 and 50 nm. These values meet the optimal t_ch requirement for OFET fabrication.

The design of monolithic microwave integrated circuits (MMICs) is a laborious process that involves exploring a vast design space, requiring multiple iterations to identify the optimal circuit design. In this research, we propose a design approach that combines GPU-based high-performance computing and transfer learning techniques. To improve modularity and reusability, we decompose the MMIC into multiple substructures and then combine these substructures to restore the overall circuit structure and performance. To achieve this, we adopted schematic simulation, which is more time-efficient, to construct a data set and pre-train the circuit substructure models. We then fine-tune the pre-trained models using a limited amount of electromagnetic (EM) simulation data, aiming to obtain layout-level subcircuit models. Leveraging the parallel processing capabilities of neural network models, we employ GPU to conduct extensive exploration and design within the circuit design space, utilizing cascade connection theory to optimize the performance of the complete circuit. We apply this methodology to a low-noise amplifier (LNA) circuit operating in the 6–13 GHz frequency range, achieving favorable outcomes.

The non-integer neuron dynamical models are feasible for accurate prediction and perfect estimation of magnetization and de-magnetization in complicated physiological environments within reliable fractal-fractional neuronal modeling. The memristive Wilson neuron model is proposed under the comparative performance of two types of fractal-fractional differentials with two different types of kernels based on two different memories. The non-classical memristive Wilson neuron model with and without magnetization is simulated for numerical schemes by means of linear multi-step integration method. The numerical simulations are traced out by discretizing continuum processes of spatial and time domains for the sake of perfect approximations under singular and non-singular kernel versus local and non-local kernel. By applying the powerful methodology of fractal-fractional differential and integral operators on the memristive Wilson neuron model, the antimonotonicity phenomenon and asymmetric coexisting electrical activities have been explored intensively to widen the neuron-based engineering applications. Remarkably, our results based on magnetization and de-magnetization procedures of Wilson neuron model have imitated the neuron activities under electrophysiological environment.

Gate-all-around field-effect transistors (GAAFETs) have garnered extensive research interest and industrial attention due to the higher gate control capability and remarkable scalability. However, as the nanochannel scales down, the phonon-boundary scattering inside channels is dramatically strengthened, resulting in a significant decrease in phonon mean free path (MFP), which in turn leads to a decrease in thermal conductivity and deteriorates electrothermal characteristics. In this paper, to accurately evaluate the degradation of thermal conductivity for confined nanochannels, an analytical model is developed by revising the boundary-induced reduction function related to both nanochannel width and thickness. The results show that the thermal conductivity calculated by the proposed model agrees well with the experimental data within 1% error over large temperature range for nanosheet and nanowire structures. Moreover, significant deviations of 6.11% in on-state current and 41.7 K in temperature are observed between the proposed and conventional models for three-stacked GAAFETs. The proposed revised methodology offers invaluable insights for assessing the electrothermal characteristics of nanodevices.

A novel, analytical treatment of noise factor in ideal transmission lines subjected to thermal gradients is presented. Temperature dependence on the propagation direction is assumed linear, whereas line loss is initially considered constant. The latter restriction is then removed, in such a manner that, for the first time in the literature, linearly varying line losses are also addressed. In both cases, closed formulae are presented allowing to compute line noise factor for arbitrary source terminations. Previous numerical implementations of the underlying theory are also reappraised both as an introduction to the Reader and as a test bench of the closed-form results. A discussion of the effects of a non-uniform temperature distribution across the transverse section of the transmission line is provided upfront, so as to clarify the conditions under which the usual simplifications are valid. This discussion too is believed by the Authors to be original.

An ultra-wide stopband bandpass filter (BPF) using second-order M-type circuit is proposed by virtue of glass-based integrated passive device (IPD) technology. The second-order M-type circuit is composed of two first-order M-type circuits in series. The first-order M-type circuit consists of a low-pass filter (LPF) and a high-pass filter (HPF), each of which can generate one transmission zero. The second-order M-type circuit can generate two transmission zeros in the low frequency band and another two transmission zeros in the high frequency band, which can achieve high rejection in the upper ultra-wide stopband. The proposed BPF covering 3.3–4.2 GHz is fabricated with a compact size of 1.0 mm × 1.0 mm × 0.3 mm on glass-based IPD technology. According to the measurements, the fabricated BPF can achieve a minimum in-band insertion loss less than 1.4 dB, a return loss better than 15.6 dB, and more than 20 dB ultra-wide stopband rejection from 5.81 to 43.5 GHz. Compared to the previous designs, the proposed BPF shows the superior advantages of compact size and ultra-wide stopband.