A 0.53-μW/channel calibration-free spike detection IC with 98.8-%-accuracy based on stationary wavelet transforms and Teager energy operators.

Zhining Zhou, Zichen Hu, Hongming Lyu
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Abstract

Objective. The brain-computer interface is currently experiencing a surge in the number of recording channels, resulting in a vast amount of raw data. It has become crucial to reliably detect neural spikes from a large population of neurons in the presence of noise, in order to constrain the transmission bandwidth.Approach. We investigate various time-frequency analysis methods for spike detection, followed by an exploration of energy operators amplifying spikes and signal statistics for adaptive thresholding. Subsequently, we introduce a precise and computationally efficient spike detection module, leveraging stationary wavelet transform (SWT), Teager energy operator, and root-mean-square calculator. This module is capable of autonomously adapting to different levels of noise. The SWT effectively eliminates high-frequency noise, enhancing the performance of the energy operators. The hardware computational process is simplified through the use of the lifting scheme and a channel-interleaving architecture.Main results. We evaluate the proposed spike detector with adaptive threshold on the publicly available WaveClus datasets. The detector achieves an average accuracy of 98.84%. The application-specific integrated circuit (ASIC) implementation results of the spike detector demonstrate an optimized interleaving channel of 8. In a 65 nm technology, the 8-channel spike detector consumes a power of 0.532μW Ch-1and occupies an area of 0.00645 mm2Ch-1, operating at a 1.2 V supply voltage.Significance. The proposed spike detection processor offers one of the highest accuracies among state-of-the-art spike detection methods. Importantly, the ASIC explores the considerations in the scalability and hardware costs. The proposed design provides a systematic solution on spike detection with adaptive thresholding, offering a high accuracy while maintaining low power and area consumptions.

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基于平稳小波变换和Teager能量算子的0.53 μ w /通道免校准峰值检测芯片,精度高达98.8%。
目的:脑机接口(BCI)目前正经历着记录通道数量的激增,导致大量的原始数据。为了限制传输带宽,从大量存在噪声的神经元中可靠地检测神经峰值变得至关重要。方法:我们研究了用于尖峰检测的各种时频分析方法,然后探索了能量算子放大尖峰和自适应阈值的信号统计。随后,我们引入了一个精确且计算效率高的尖峰检测模块,该模块利用平稳小波变换(SWT)、Teager能量算子(TEO)和均方根(RMS)计算器。该模块能够自主适应不同程度的噪音。SWT有效地消除了高频噪声,提高了能量算子的性能。通过使用提升方案和通道交错结构,简化了硬件计算过程。主要结果:我们在公开可用的WaveClus数据集上评估了提出的具有自适应阈值的峰值检测器。该检测器的平均准确率为98.84%。该尖峰检测器的专用集成电路(ASIC)实现结果显示了一个优化的8路交叉通道。在65纳米技术中,8通道尖峰探测器功耗为0.532 μW/Ch,占地面积为0.00645 mm2/Ch,工作在1.2 v电源电压下。意义:提出的尖峰检测处理器提供了最先进的尖峰检测方法中最高的准确性之一。重要的是,ASIC探讨了可扩展性和硬件成本方面的考虑。提出的设计提供了一个具有自适应阈值的尖峰检测系统解决方案,在保持低功耗和面积消耗的同时提供高精度。
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