Low-Temperature SLID-TSV Interconnects for 3-D (MEMS) Packaging

IF 3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2025-01-13 DOI:10.1109/TCPMT.2025.3528519
Fahimeh Emadi;Shenyi Liu;Vesa Vuorinen;Mervi Paulasto-Kröckel
{"title":"Low-Temperature SLID-TSV Interconnects for 3-D (MEMS) Packaging","authors":"Fahimeh Emadi;Shenyi Liu;Vesa Vuorinen;Mervi Paulasto-Kröckel","doi":"10.1109/TCPMT.2025.3528519","DOIUrl":null,"url":null,"abstract":"Three-dimensional heterogeneous integration is becoming increasingly important in advanced packaging as device functionalities expand within smaller spaces. Three-dimensional interconnects such as through silicon via (TSV)-solid–liquid interdiffusion (SLID) interconnects offer a promising approach for achieving miniaturization, high integration, and reduced power consumption. However, well-known Cu–Sn SLID-TSVs require high bonding temperatures, leading to residual stress and cracks. This research focuses on developing 3-D interconnects by using Cu–Sn–In/Co SLID-TSVs, which decrease bonding temperatures and reduce these issues. Finite element (FE) simulations qualitatively compared stress states in both SLID-TSV systems, showing lower residual stress in the Cu–Sn–In/Co SLID system than in Cu–Sn SLID. The Cu–Sn–In/Co SLID-TSV underwent microstructural analysis and reliability tests, including high-temperature storage (HTS), thermal shock (TS), and tensile strength testing. Most samples were free of voids and cracks, with a few showing minor defects along the bond line after TS. No cracks were observed inside the Si and TSVs. This indicates that adopting the Cu–Sn–In/Co system and reducing the bonding temperature to 200 °C can effectively prevent crack formations across bond lines, Si, and TSVs. Furthermore, all the samples meet the tensile strength requirements according to MIL-STD-883 method 2027.2, with the highest value observed for HTS-tested samples. Hence, low-temperature 3-D SLID-TSV interconnects were successfully demonstrated, showing strong potential for 3-D MEMS-ICs.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 2","pages":"377-386"},"PeriodicalIF":3.0000,"publicationDate":"2025-01-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10839082","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Components, Packaging and Manufacturing Technology","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10839082/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
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Abstract

Three-dimensional heterogeneous integration is becoming increasingly important in advanced packaging as device functionalities expand within smaller spaces. Three-dimensional interconnects such as through silicon via (TSV)-solid–liquid interdiffusion (SLID) interconnects offer a promising approach for achieving miniaturization, high integration, and reduced power consumption. However, well-known Cu–Sn SLID-TSVs require high bonding temperatures, leading to residual stress and cracks. This research focuses on developing 3-D interconnects by using Cu–Sn–In/Co SLID-TSVs, which decrease bonding temperatures and reduce these issues. Finite element (FE) simulations qualitatively compared stress states in both SLID-TSV systems, showing lower residual stress in the Cu–Sn–In/Co SLID system than in Cu–Sn SLID. The Cu–Sn–In/Co SLID-TSV underwent microstructural analysis and reliability tests, including high-temperature storage (HTS), thermal shock (TS), and tensile strength testing. Most samples were free of voids and cracks, with a few showing minor defects along the bond line after TS. No cracks were observed inside the Si and TSVs. This indicates that adopting the Cu–Sn–In/Co system and reducing the bonding temperature to 200 °C can effectively prevent crack formations across bond lines, Si, and TSVs. Furthermore, all the samples meet the tensile strength requirements according to MIL-STD-883 method 2027.2, with the highest value observed for HTS-tested samples. Hence, low-temperature 3-D SLID-TSV interconnects were successfully demonstrated, showing strong potential for 3-D MEMS-ICs.
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用于三维(MEMS)封装的低温 SLID-TSV 互连器件
随着设备功能在更小的空间内扩展,三维异构集成在先进封装中变得越来越重要。三维互连,如硅通孔(TSV)-固液互扩散(slide)互连,为实现小型化、高集成度和降低功耗提供了一种有前途的方法。然而,众所周知的Cu-Sn slid - tsv需要很高的结合温度,导致残余应力和裂纹。本研究的重点是通过使用Cu-Sn-In /Co slid - tsv开发3d互连,从而降低键合温度并减少这些问题。有限元(FE)模拟定性比较了两种滑动- tsv系统的应力状态,表明Cu-Sn - in /Co滑动系统的残余应力低于Cu-Sn滑动系统。Cu-Sn-In /Co slide - tsv进行了显微组织分析和可靠性测试,包括高温储存(HTS)、热冲击(TS)和拉伸强度测试。大多数样品没有空洞和裂纹,少数样品在TS后沿结合线出现了较小的缺陷,Si和tsv内部未观察到裂纹。这表明,采用Cu-Sn-In /Co体系,将结合温度降低到200℃,可以有效防止在结合线、Si和tsv之间形成裂纹。所有样品均满足MIL-STD-883方法2027.2的抗拉强度要求,高温试验样品的抗拉强度最高。因此,低温3-D slide - tsv互连成功演示,显示了3-D mems - ic的强大潜力。
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来源期刊
IEEE Transactions on Components, Packaging and Manufacturing Technology
IEEE Transactions on Components, Packaging and Manufacturing Technology ENGINEERING, MANUFACTURING-ENGINEERING, ELECTRICAL & ELECTRONIC
CiteScore
4.70
自引率
13.60%
发文量
203
审稿时长
3 months
期刊介绍: IEEE Transactions on Components, Packaging, and Manufacturing Technology publishes research and application articles on modeling, design, building blocks, technical infrastructure, and analysis underpinning electronic, photonic and MEMS packaging, in addition to new developments in passive components, electrical contacts and connectors, thermal management, and device reliability; as well as the manufacture of electronics parts and assemblies, with broad coverage of design, factory modeling, assembly methods, quality, product robustness, and design-for-environment.
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