Low power consumption of non-volatile memory device by tunneling process engineering

Abstract

Compared with Si₃N₄ and Al₂O₃, SiO₂ grown using thermal oxidation process as tunneling layer has the advantages of high bandgap and well interface contact with the surface of silicon wafer, which can be a great solution to the leakage current problem of metal–insulator-semiconductor (MIS) devices. This study investigates the effect of improving the SiO₂ tunnel layer on the operating voltage of MIS devices with a SiO₂/HfAlO_x/Al₂O₃ structure. The result shows the operating voltage changes as the tunneling layer thickness decreases, with a minimum of only 12 V for a 1.5 nm tunneling layer thickness. In addition, we found that pinholes are generated on the film surface when annealing a 1.5 nm SiO₂ tunnel layer at 850 °C N₂, in which case the operating voltage of the device is reduced to only 10 V, though it was also accompanied by the deterioration of the retention characteristics.