Failure Analysis on Abnormal Cracking of Flip-Chip Au Bumps During the High Temperature and Humidity Testing

Abstract

Fine-pitch flip-chip Au bumps play a critical role in interconnecting and packaging advanced optoelectronics, historically known for their good corrosion resistance and high reliability. However, this study reveals the susceptibility of Au bumps to corrosion and cracking during $85~^{\circ }$ C/85%RH high temperature and humidity (THT) reliability testing. Cracks were observed at the under bump metallization (UBM) interfaces, originating at the bump undercut and propagating toward the bump center. This leads to a dramatic 26.7% reduction in mechanical shear strength, significantly compromising the reliability. The failure mechanism of Au bump was analyzed through the combination of characterization and simulation, which identifies a stress-induced and halogen-enhanced galvanic cell corrosion at the UBM interfaces as the root cause. Furthermore, a protective surface coating strategy involving self-assembled monolayer (SAM) notably improves bump corrosion resistance, as demonstrated by the absence of strength degradation and interfacial delamination after a 500-h accelerated THT test. These insights are pivotal for advancing reliable, high-performance optoelectronic packaging.