Risk of CuxO phase penetration between the Ag plating layer and Cu during high-temperature reliability testing of interfaces bonded to cold sintered Ag nano-porous sheets on direct Ag-plated Cu substrates

IF 1.9 4区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Microelectronics Reliability Pub Date : 2025-03-31 DOI:10.1016/j.microrel.2025.115719

YehRi Kim , Eunjin Jo , Byeong Kwon Ju , Yoongul Lee , Jaeup Kim , Kijoon Ahn , Seungjun Noh , Dongjin Kim

{"title":"Risk of CuxO phase penetration between the Ag plating layer and Cu during high-temperature reliability testing of interfaces bonded to cold sintered Ag nano-porous sheets on direct Ag-plated Cu substrates","authors":"YehRi Kim , Eunjin Jo , Byeong Kwon Ju , Yoongul Lee , Jaeup Kim , Kijoon Ahn , Seungjun Noh , Dongjin Kim","doi":"10.1016/j.microrel.2025.115719","DOIUrl":null,"url":null,"abstract":"<div><div>This study was carried out to understand the high-temperature stability of Ag nano-porous sheet bonded joints during thermal aging. The joints have been designed to be between two Ag metallization layers directly plated on copper layers of the die and substrate. The Cu<sub>x</sub>O penetration between Ag plated layer and Cu substrate formed during thermal aging at 250 °C from 125 h, during which Cu<sub>x</sub>O layer continuously grew up to 1000 h. The growing Cu<sub>x</sub>O phase penetrated between the Ag plating and Cu, leading to voids that developed into a delamination layer over time. The delamination and continuous voids formed between Cu<sub>x</sub>O layer and Cu had a critical effect on reducing the bonding strength. In this study, we thoroughly investigated the issues that may arise during thermal reliability testing at 250 °C when bonding commercial Ag nano-porous sheets directly Ag-plated onto Cu, from the perspective of microstructural development.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"168 ","pages":"Article 115719"},"PeriodicalIF":1.9000,"publicationDate":"2025-03-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Reliability","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0026271425001325","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}

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Abstract

This study was carried out to understand the high-temperature stability of Ag nano-porous sheet bonded joints during thermal aging. The joints have been designed to be between two Ag metallization layers directly plated on copper layers of the die and substrate. The Cu_xO penetration between Ag plated layer and Cu substrate formed during thermal aging at 250 °C from 125 h, during which Cu_xO layer continuously grew up to 1000 h. The growing Cu_xO phase penetrated between the Ag plating and Cu, leading to voids that developed into a delamination layer over time. The delamination and continuous voids formed between Cu_xO layer and Cu had a critical effect on reducing the bonding strength. In this study, we thoroughly investigated the issues that may arise during thermal reliability testing at 250 °C when bonding commercial Ag nano-porous sheets directly Ag-plated onto Cu, from the perspective of microstructural development.

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直接镀银铜基板上冷烧结银纳米孔片结合界面高温可靠性测试中镀银层与Cu之间CuxO相渗透的风险

研究了银纳米多孔板焊接接头在热老化过程中的高温稳定性。接头被设计为直接镀在模具和衬底的铜层上的两个银金属化层之间。在250℃热时效125 h开始，镀银层和Cu衬底之间形成CuxO侵彻，在此过程中，CuxO层不断生长至1000 h。随着时间的推移，CuxO相在镀银层和Cu衬底之间穿透，形成空洞，形成脱层层。CuxO层与Cu之间的分层和连续空洞是降低结合强度的关键因素。在这项研究中，我们从微观结构发展的角度，深入研究了在250°C下直接镀银到Cu上的商业银纳米多孔片粘合时可能出现的热可靠性测试问题。

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来源期刊

Microelectronics Reliability 工程技术-工程：电子与电气

CiteScore

3.30

自引率

12.50%

发文量

342

审稿时长

68 days

期刊介绍： Microelectronics Reliability, is dedicated to disseminating the latest research results and related information on the reliability of microelectronic devices, circuits and systems, from materials, process and manufacturing, to design, testing and operation. The coverage of the journal includes the following topics: measurement, understanding and analysis; evaluation and prediction; modelling and simulation; methodologies and mitigation. Papers which combine reliability with other important areas of microelectronics engineering, such as design, fabrication, integration, testing, and field operation will also be welcome, and practical papers reporting case studies in the field and specific application domains are particularly encouraged. Most accepted papers will be published as Research Papers, describing significant advances and completed work. Papers reviewing important developing topics of general interest may be accepted for publication as Review Papers. Urgent communications of a more preliminary nature and short reports on completed practical work of current interest may be considered for publication as Research Notes. All contributions are subject to peer review by leading experts in the field.