Reliability Analysis of Radiation Tolerant Low Voltage CCCII Circuit For Space Applications

Pub Date : 2022-12-06 DOI:10.14429/dsj.72.17583
A. Pathak, M. K. Tiwari, N. Pandey, S. K. Paul, Saiyid Mohammad Irshad Rizvi
{"title":"Reliability Analysis of Radiation Tolerant Low Voltage CCCII Circuit For Space Applications","authors":"A. Pathak, M. K. Tiwari, N. Pandey, S. K. Paul, Saiyid Mohammad Irshad Rizvi","doi":"10.14429/dsj.72.17583","DOIUrl":null,"url":null,"abstract":"In this paper, the impact of radiation on the MOS devices is investigated on recently reported programmablesecond generation Current Controlled Conveyor (CCCII) wherein some updates are suggested to take Hot Carrier Injection, Bias Temperature Instability, and Time Dependent Dielectric Breakdown into account. As radiation is yet another important factor that causes change in threshold voltage, the transistors which are amenable to larger threshold shift and may lead to functional failure are identified first. Subsequently, three possibilities; uses of all thin oxide devices, all thick oxide devices, and mixed devices are being investigate and it is found that while using mixed devices, the circuit becomes functional at lower voltage without any effective increase in leakage current. Architecture is updated to enhance the performance of circuits under time-based ageing and radiation environment. The major challenge is to control dynamic leakage and radiative noise due to imposed radiation. All simulations are carried out using 28nm CMOS technology models in Cadence Virtuoso environment using ±1.0V supply voltage and results have been verified with post layout netlist. Proposed circuit can function at low voltage with the reduced degradation for 8 years at 25 °C consumes less area as compared to the existing CCCII circuit with 0.008 FIT value.","PeriodicalId":0,"journal":{"name":"","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2022-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.14429/dsj.72.17583","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

In this paper, the impact of radiation on the MOS devices is investigated on recently reported programmablesecond generation Current Controlled Conveyor (CCCII) wherein some updates are suggested to take Hot Carrier Injection, Bias Temperature Instability, and Time Dependent Dielectric Breakdown into account. As radiation is yet another important factor that causes change in threshold voltage, the transistors which are amenable to larger threshold shift and may lead to functional failure are identified first. Subsequently, three possibilities; uses of all thin oxide devices, all thick oxide devices, and mixed devices are being investigate and it is found that while using mixed devices, the circuit becomes functional at lower voltage without any effective increase in leakage current. Architecture is updated to enhance the performance of circuits under time-based ageing and radiation environment. The major challenge is to control dynamic leakage and radiative noise due to imposed radiation. All simulations are carried out using 28nm CMOS technology models in Cadence Virtuoso environment using ±1.0V supply voltage and results have been verified with post layout netlist. Proposed circuit can function at low voltage with the reduced degradation for 8 years at 25 °C consumes less area as compared to the existing CCCII circuit with 0.008 FIT value.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
空间用耐辐射低压CCCII电路可靠性分析
本文研究了最近报道的可编程第二代电流控制输送机(CCCII)中辐射对MOS器件的影响,其中建议进行一些更新,以考虑热载流子注入,偏置温度不稳定性和时间相关的介电击穿。由于辐射是引起阈值电压变化的另一个重要因素,因此首先确定可承受较大阈值位移并可能导致功能失效的晶体管。随后,有三种可能性;对所有薄氧化物器件、所有厚氧化物器件和混合器件的使用进行了研究,发现当使用混合器件时,电路在较低电压下工作,而没有有效地增加漏电流。架构更新,以提高电路在时间老化和辐射环境下的性能。主要的挑战是控制动态泄漏和由于施加辐射引起的辐射噪声。所有仿真均采用28nm CMOS技术模型在Cadence Virtuoso环境下进行,电源电压为±1.0V,并通过后布局网表对仿真结果进行了验证。与现有的FIT值为0.008的CCCII电路相比,所提出的电路可以在25°C的低电压下工作,降低了8年的退化。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1