Collective Cu-Cu Thermocompression Bonding Using Pillars

R. Carroll, Douglas La Tulipe, D. Coolbaugh, R. Geer
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Abstract

The demand for high-performance, high-functionality packages for integrated circuits continues to grow. Three-dimensional (3D) integration is strongly being pursued to meet this demand and has started to reach maturity and industrial adoption. As advanced 3D system designs progress, requiring higher 3D interconnect density with pitches of 10 μm and lower, traditional chip attachment through solder bump technology will likely face complex manufacturing and reliability challenges. Cu-Cu thermocompression bonding has been proposed as a key 3D-enabling technology and alternative to solder. One of the main issues challenging its commercialization in high-volume manufacturing is the sensitivity of Cu-Cu bond quality to prebond surface conditions. This is especially true for die bonding applications which have limited rework options once chips have been singulated. This article outlines further development and demonstration of a tack and collective bonding scheme for Cu-Cu thermocompression bonding. This approach mitigates many of the thermal and throughput issues of a chip-level Cu-Cu attachment process by performing the quick chip alignment at a low temperature and then subsequently completing all Cu bonding simultaneously. The specific use of an intermediate handle wafer between the tack and collective bonding steps allows chips to be reconstructed into a wafer form that facilitates the cleaning and surface preparation of the chips before bonding using standard wafer processing equipment. A chip-to-wafer test structure designed for Cu pillar-to-pad bonding was used as part of this demonstration and illustrates the feasibility of the application. Full transfer of chips to a receiving device wafer using the tack and collective bonding process is shown with electrical test results and selected bond-integrity metrology confirming substantial bond yield and strength.
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柱式集体Cu-Cu热压键合
集成电路对高性能、高功能封装的需求持续增长。三维(3D)集成正在被大力追求以满足这一需求,并且已经开始达到成熟和工业应用。随着先进3D系统设计的进步,要求更高的3D互连密度(间距为10 μm或更低),传统的通过凸点焊的芯片连接技术可能面临复杂的制造和可靠性挑战。Cu-Cu热压键合已被提出作为一种关键的3d实现技术和焊料的替代品。Cu-Cu键合质量对预键合表面条件的敏感性是其在大批量生产中商业化面临的主要挑战之一。这尤其适用于模具粘合应用,一旦芯片被单独处理,其返工选择就会受到限制。本文概述了Cu-Cu热压键合的tack和collective键合方案的进一步发展和演示。这种方法通过在低温下执行快速芯片对准,然后同时完成所有Cu键合,减轻了芯片级Cu-Cu连接过程中的许多热和吞吐量问题。在粘接和集体粘接步骤之间具体使用中间手柄晶圆,允许芯片被重构成晶圆形式,便于在使用标准晶圆处理设备粘接之前对芯片进行清洁和表面制备。设计用于铜柱与焊盘键合的芯片到晶圆测试结构作为演示的一部分,并说明了该应用的可行性。使用粘接和集体粘接工艺将芯片完全转移到接收器件晶圆上,电学测试结果和选定的粘接完整性计量证实了大量的粘接收率和强度。
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来源期刊
Journal of Microelectronics and Electronic Packaging
Journal of Microelectronics and Electronic Packaging Engineering-Electrical and Electronic Engineering
CiteScore
1.30
自引率
0.00%
发文量
5
期刊介绍: The International Microelectronics And Packaging Society (IMAPS) is the largest society dedicated to the advancement and growth of microelectronics and electronics packaging technologies through professional education. The Society’s portfolio of technologies is disseminated through symposia, conferences, workshops, professional development courses and other efforts. IMAPS currently has more than 4,000 members in the United States and more than 4,000 international members around the world.
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